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From: Zhi Mao <zhi.mao@mediatek.com>
To: m18063 <Claudiu.Beznea@microchip.com>
Cc: <john@phrozen.org>, Thierry Reding <thierry.reding@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-pwm@vger.kernel.org>, <zhenbao.liu@mediatek.com>,
	<devicetree@vger.kernel.org>, <srv_heupstream@mediatek.com>,
	<sean.wang@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <yt.shen@mediatek.com>,
	<yingjoe.chen@mediatek.com>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX
Date: Tue, 27 Jun 2017 10:50:15 +0800	[thread overview]
Message-ID: <1498531815.22478.3.camel@mhfsdcap03> (raw)
In-Reply-To: <8eaabcb6-c7b1-efcc-7dae-967a38feb8f1@microchip.com>

On Mon, 2017-06-26 at 11:43 +0300, m18063 wrote:
> 
> On 23.06.2017 08:08, Zhi Mao wrote:
> > Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config()
> > to improve the code readablity.
> > 
> > Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
> > ---
> >  drivers/pwm/pwm-mediatek.c |    6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> > index 554a042..e5f6425 100644
> > --- a/drivers/pwm/pwm-mediatek.c
> > +++ b/drivers/pwm/pwm-mediatek.c
> > @@ -30,6 +30,8 @@
> >  #define PWMDWIDTH		0x2c
> >  #define PWMTHRES		0x30
> >  
> > +#define PWM_CLK_DIV_MAX		7
> > +
> >  enum {
> >  	MTK_CLK_MAIN = 0,
> >  	MTK_CLK_TOP,
> > @@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
> >  		clkdiv++;
> >  	}
> >  
> > -	if (clkdiv > 7)
> > +	if (clkdiv > PWM_CLK_DIV_MAX) {
> You forgot to:
> 		mtk_pwm_clk_disable(chip, pwm);
Hi Claudiu,

Thanks for your suggestion.
It's a problem, I will modify this in the next release.

Regards,
Zhi
> > +		dev_err(chip->dev, "period %d not supported\n", period_ns);
> >  		return -EINVAL;
> > +	}
> >  
> >  	mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
> >  	mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
> > 

  reply	other threads:[~2017-06-27  2:50 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-23  5:08 [PATCH v2 0/6] mediatek: pwm driver add MT2712/MT7622 support Zhi Mao
2017-06-23  5:08 ` [PATCH v2 1/6] pwm: kconfig: modify mediatek information Zhi Mao
2017-06-23  5:08 ` [PATCH v2 2/6] pwm: mediatek: fix pwm source clock selection Zhi Mao
2017-06-23  5:08 ` [PATCH v2 3/6] pwm: mediatek: fix clock control issue Zhi Mao
2017-06-23  5:08 ` [PATCH v2 4/6] pwm: bindings: add MT2712/MT7622 information Zhi Mao
2017-06-26 19:04   ` Rob Herring
2017-06-23  5:08 ` [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao
2017-06-26  8:43   ` m18063
2017-06-27  2:50     ` Zhi Mao [this message]
2017-06-23  5:08 ` [PATCH v2 6/6] pwm: mediatek: add MT2712/MT7622 support Zhi Mao
2017-06-23  5:48 ` [PATCH v2 0/6] mediatek: pwm driver " John Crispin

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