From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752952AbdGUGYy (ORCPT ); Fri, 21 Jul 2017 02:24:54 -0400 Received: from regular1.263xmail.com ([211.150.99.135]:40432 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751996AbdGUGYv (ORCPT ); Fri, 21 Jul 2017 02:24:51 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: xxm@rock-chips.com X-FST-TO: joro@8bytes.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: xxm@rock-chips.com X-UNIQUE-TAG: <8261f562888099cf60378905cff5d7b5> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Simon Xue To: Joerg Roedel , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Simon Subject: [PATCH V2 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes Date: Fri, 21 Jul 2017 14:24:20 +0800 Message-Id: <1500618261-114262-3-git-send-email-xxm@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500618261-114262-1-git-send-email-xxm@rock-chips.com> References: <1500618261-114262-1-git-send-email-xxm@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Simon Add IEP/ISP/VOP/HEVC/VPU iommu nodes Signed-off-by: Simon --- changes since V1: - add rk-iommu,disable-reset-quirk for isp mmu to ignore the isp mmu reset operation arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49 ++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 6d5dc05..98cacc0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -724,6 +724,55 @@ status = "disabled"; }; + iep_mmu: iommu@ff900800 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff900800 0x0 0x100>; + interrupts = ; + interrupt-names = "iep_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + + isp_mmu: iommu@ff914000 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff914000 0x0 0x100>, + <0x0 0xff915000 0x0 0x100>; + interrupts = ; + interrupt-names = "isp_mmu"; + #iommu-cells = <0>; + rk-iommu,disable-reset-quirk; + status = "disabled"; + }; + + vop_mmu: iommu@ff930300 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff930300 0x0 0x100>; + interrupts = ; + interrupt-names = "vop_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + + hevc_mmu: iommu@ff9a0440 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff9a0440 0x0 0x40>, + <0x0 0xff9a0480 0x0 0x40>; + interrupts = ; + interrupt-names = "hevc_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + + vpu_mmu: iommu@ff9a0800 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff9a0800 0x0 0x100>; + interrupts = , + ; + interrupt-names = "vepu_mmu", "vdpu_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@ffb71000 { compatible = "arm,gic-400"; interrupt-controller; -- 1.9.1