From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754482AbdKALKS (ORCPT ); Wed, 1 Nov 2017 07:10:18 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:9928 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751482AbdKALKR (ORCPT ); Wed, 1 Nov 2017 07:10:17 -0400 From: Dongjiu Geng To: , , , , , , , , , , , , , , Subject: [PATCH v1 1/3] arm64: add a macro for SError synchronization Date: Thu, 2 Nov 2017 03:14:55 +0800 Message-ID: <1509563697-6359-2-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1509563697-6359-1-git-send-email-gengdongjiu@huawei.com> References: <1509563697-6359-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.143.28.90] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.59F9AB5D.0033,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 028dbbd3b497c63accbfed8ca528feb2 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ARMv8.2 adds a control bit to each SCTLR_ELx to insert implicit Error Synchronization Barrier(IESB) operations at exception handler entry and exit. But not all hardware platform which support RAS Extension can support IESB. So for this case, software needs to manually insert Error Synchronization Barrier(ESB) operations. In this macros, if system supports RAS Extensdddon instead of IESB, it will insert an ESB instruction. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/assembler.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index d4c0adf..e6c79c4 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -517,4 +517,13 @@ #endif .endm + .macro error_synchronize +alternative_if ARM64_HAS_IESB + b 1f +alternative_else_nop_endif +alternative_if ARM64_HAS_RAS_EXTN + esb +alternative_else_nop_endif +1: + .endm #endif /* __ASM_ASSEMBLER_H */ -- 1.9.1