From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753541AbeAKCk4 (ORCPT + 1 other); Wed, 10 Jan 2018 21:40:56 -0500 Received: from mail-pf0-f194.google.com ([209.85.192.194]:43350 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753200AbeAKCkq (ORCPT ); Wed, 10 Jan 2018 21:40:46 -0500 X-Google-Smtp-Source: ACJfBotOXGszxa9prHDRIRuUZhsVYvdcpqfvE5s1EpVy49CjfIWWORu2dfhbKJsvXp4d1m9l4mI/Og== From: Caesar Wang To: Kishon Vijay Abraham I Cc: Brian Norris , Douglas Anderson , Shawn Lin , Caesar Wang , Heiko Stuebner , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 2/2] phy: rockchip-emmc: use regmap_read_poll_timeout to poll dllrdy Date: Thu, 11 Jan 2018 10:40:27 +0800 Message-Id: <1515638427-15117-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515638427-15117-1-git-send-email-wxt@rock-chips.com> References: <1515638427-15117-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: From: Shawn Lin Just use the API instead of open-coding it, no functional change intended. Signed-off-by: Shawn Lin Reviewed-by: Brian Norris Signed-off-by: Caesar Wang --- Changes in v3: - As Doug commented on https://patchwork.kernel.org/patch/10154797, Change "1, 50" to "0, 50". Changes in v2: - As Brian commented on https://patchwork.kernel.org/patch/10139891/, changed the note and added to print error value with regmap_read_poll_timeout API. drivers/phy/rockchip/phy-rockchip-emmc.c | 33 +++++++++++--------------------- 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-emmc.c b/drivers/phy/rockchip/phy-rockchip-emmc.c index b0d1093..b237360 100644 --- a/drivers/phy/rockchip/phy-rockchip-emmc.c +++ b/drivers/phy/rockchip/phy-rockchip-emmc.c @@ -79,6 +79,9 @@ #define PHYCTRL_IS_CALDONE(x) \ ((((x) >> PHYCTRL_CALDONE_SHIFT) & \ PHYCTRL_CALDONE_MASK) == PHYCTRL_CALDONE_DONE) +#define PHYCTRL_IS_DLLRDY(x) \ + ((((x) >> PHYCTRL_DLLRDY_SHIFT) & \ + PHYCTRL_DLLRDY_MASK) == PHYCTRL_DLLRDY_DONE) struct rockchip_emmc_phy { unsigned int reg_offset; @@ -93,7 +96,6 @@ static int rockchip_emmc_phy_power(struct phy *phy, bool on_off) unsigned int dllrdy; unsigned int freqsel = PHYCTRL_FREQSEL_200M; unsigned long rate; - unsigned long timeout; int ret; /* @@ -217,28 +219,15 @@ static int rockchip_emmc_phy_power(struct phy *phy, bool on_off) * NOTE: There appear to be corner cases where the DLL seems to take * extra long to lock for reasons that aren't understood. In some * extreme cases we've seen it take up to over 10ms (!). We'll be - * generous and give it 50ms. We still busy wait here because: - * - In most cases it should be super fast. - * - This is not called lots during normal operation so it shouldn't - * be a power or performance problem to busy wait. We expect it - * only at boot / resume. In both cases, eMMC is probably on the - * critical path so busy waiting a little extra time should be OK. + * generous and give it 50ms. */ - timeout = jiffies + msecs_to_jiffies(50); - do { - udelay(1); - - regmap_read(rk_phy->reg_base, - rk_phy->reg_offset + GRF_EMMCPHY_STATUS, - &dllrdy); - dllrdy = (dllrdy >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK; - if (dllrdy == PHYCTRL_DLLRDY_DONE) - break; - } while (!time_after(jiffies, timeout)); - - if (dllrdy != PHYCTRL_DLLRDY_DONE) { - pr_err("rockchip_emmc_phy_power: dllrdy timeout.\n"); - return -ETIMEDOUT; + ret = regmap_read_poll_timeout(rk_phy->reg_base, + rk_phy->reg_offset + GRF_EMMCPHY_STATUS, + dllrdy, PHYCTRL_IS_DLLRDY(dllrdy), + 0, 50 * USEC_PER_MSEC); + if (ret) { + pr_err("%s: dllrdy failed. ret=%d\n", __func__, ret); + return ret; } return 0; -- 2.7.4