From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754783AbeARIcC (ORCPT ); Thu, 18 Jan 2018 03:32:02 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:29710 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750841AbeARIcA (ORCPT ); Thu, 18 Jan 2018 03:32:00 -0500 X-UUID: 0348ae69059e42c885093198338a88d6-20180118 Message-ID: <1516264313.16602.30.camel@mhfsdcap03> Subject: Re: FW: [PATCH v20 2/4] mailbox: mediatek: Add Mediatek CMDQ driver From: houlong wei To: Jassi Brar CC: Rob Herring , Matthias Brugger , Daniel Kurtz , "Sascha Hauer" , Devicetree List , Linux Kernel Mailing List , , , srv_heupstream , Sascha Hauer , Philipp Zabel , Nicolas Boichat , CK Hu =?UTF-8?Q?=28=E8=83=A1=E4=BF=8A=E5=85=89=29?= , "Cawa Cheng =?UTF-8?Q?=28=E9=84=AD=E6=9B=84=E7=A6=A7=29?=" , Bibby Hsieh =?UTF-8?Q?=28=E8=AC=9D=E6=BF=9F=E9=81=A0=29?= , YT Shen =?UTF-8?Q?=28=E6=B2=88=E5=B2=B3=E9=9C=86=29?= , Daoyuan Huang =?UTF-8?Q?=28=E9=BB=83=E9=81=93=E5=8E=9F=29?= , Damon Chu =?UTF-8?Q?=28=E6=9C=B1=E5=B3=BB=E8=B3=A2=29?= , Josh-YC Liu =?UTF-8?Q?=28=E5=8A=89=E8=82=B2=E8=AA=A0=29?= , Glory Hung =?UTF-8?Q?=28=E6=B4=AA=E6=99=BA=E7=91=8B=29?= , Jiaguang Zhang =?UTF-8?Q?=28=E5=BC=A0=E5=8A=A0=E5=B9=BF=29?= , Dennis-YC Hsieh =?UTF-8?Q?=28=E8=AC=9D=E5=AE=87=E5=93=B2=29?= , Monica Wang =?UTF-8?Q?=28=E7=8E=8B=E5=AD=9F=E5=A9=B7=29?= , Hs Liao =?UTF-8?Q?=28=E5=BB=96=E5=AE=8F=E7=A5=A5=29?= , Date: Thu, 18 Jan 2018 16:31:53 +0800 In-Reply-To: References: <1483499169-16329-1-git-send-email-hs.liao@mediatek.com> <1483499169-16329-3-git-send-email-hs.liao@mediatek.com> <1485419833.990.1.camel@mtksdaap41> <1486359476.11424.33.camel@mtksdaap41> <1487733150.15869.11.camel@mtksdaap41> <1487854104.17813.1.camel@mtksdaap41> <497f8e4ef7ae4c8a9b7b4ab259801306@mtkmbs01n1.mediatek.inc> <1515400735.21044.35.camel@mhfsdcap03> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jassi, There is one request for one GCE h/w buffer which contains a list of registers operation. I will resubmit a version and please review again. Thanks, Houlong On Thu, 2018-01-18 at 16:01 +0800, Jassi Brar wrote: > On Mon, Jan 8, 2018 at 2:08 PM, houlong wei wrote: > > Hi Jassi, > > > > Sorry for reply so late. > > According to previous discussion, there are two methods to move > > dma_map_single() outside of spin_lock. > > (1) put in mtk-cmdq-helper.c, as described by HS on 2017-02-09. > > > I think a trade-off solution is to put in mtk-cmdq-helper.c. > > > Although it is a mailbox client, it is not a CMDQ client. > > > We can include mailbox_controller.h in mtk-cmdq-helper.c (instead of > > mtk-cmdq.h), and then map dma at cmdq_pkt_flush_async before > > mbox_send_message. > > > > > pkt->pa_base = dma_map_single(client->chan->mbox->dev, pkt->va_base, > > > pkt->cmd_buf_size, DMA_TO_DEVICE); > > (2) schedule a tasklet in send_data(). > > > > After internal discussion with HS and other experts, now we prefer > > method (1). > > How do you think about it? > > > I don't exactly see how you mean but please remember send_data() > callback is supposed to be atomic ... it is protected by > spin_lock_irqsave/restore in drivers/mailbox/mailbox.c:msg_submit() > > BTW, how many requests max can be queued in the GCE h/w buffer? > And since it's been over a year now, could you please resubmit after > checking for checkpatch with the --strict option? > > Thanks.