From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x225BYWYLMui1qmNXLLvxFVtevzJtXt7Pv27QrlisRrg2wTx5Osr4I2SpMNAkbJDmKis5Q1Pf ARC-Seal: i=1; a=rsa-sha256; t=1516451084; cv=none; d=google.com; s=arc-20160816; b=YOq5tJToI0v16Y9hUyPjuxMGBjIyCzVM13gR4Ijl7pg+dmQZrDTbrHxt2Z7b7NM5R1 U030R423Iq2NA9R0ptTUMoIaoa5pXWJuWlhnBkMrN+IB8PKvHbZPsP5mmwAoBu8sKn7e 0YJDaCTPodOz+tv7OpE4cAtsv/8dgU97cngDpA/RQ6h8pA74zJcO+jv32+Ep9rANiG3u eY8mMADFbn4kKxyFfLg5hPhMkMx7rRECu6FgcebgXPHd7c9tOVZAMUjdEob4kjewfkcE Cy1wrnfTfjfO0d8SlVag+h2toTucS64D2Ik/HdBV8dal92SmmLt0a6zyK08e5M4Ha/Xj Sqyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:to:from:dkim-signature :arc-authentication-results; bh=1Rls5ljYjpsRsy457iEjKn5zRJOgIG5hgD0i905HgzY=; b=BQ+b6QWiCHLE3K4nSjXhd0MRV1JuF3zcG2X3WQaRQg+JXLC8n2QR/RegTuBrwppDDO H6d5WD3P9K5HF6ZNGaTVQOnLfQ5nx94oNgNcmnLpxaJRCeg+NNwaGh2R2qFyGGEKZAuo rjVpkVNCKYWTVvN+09AUQ8o/1r/AV+AHsLmLqI2P9Kn+LNiXJrb64cKZSdz7zpkiV+Jt edHuy/3H3hkSZbDtTmxtVD+89ZjCskh5e8Gc/G+8ZpTbRp1LVG5X6WzDQxU57u3RyAbj eaaXnnRTL3IXYCrUKHZZhUGiRFiZWraWwImCmUkASaDJeqAjHS8KAFHwJzCNMLqYmWjz QOLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amazon.co.uk header.s=amazon201209 header.b=umV7VYoe; spf=pass (google.com: domain of prvs=55101727d=dwmw@amazon.com designates 207.171.184.29 as permitted sender) smtp.mailfrom=prvs=55101727d=dwmw@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.co.uk Authentication-Results: mx.google.com; dkim=pass header.i=@amazon.co.uk header.s=amazon201209 header.b=umV7VYoe; spf=pass (google.com: domain of prvs=55101727d=dwmw@amazon.com designates 207.171.184.29 as permitted sender) smtp.mailfrom=prvs=55101727d=dwmw@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.co.uk X-IronPort-AV: E=Sophos;i="5.46,386,1511827200"; d="scan'208";a="588265104" From: David Woodhouse To: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org Subject: [PATCH 0/4] Basic Speculation Control feature support Date: Sat, 20 Jan 2018 12:03:29 +0000 Message-Id: <1516449813-7654-1-git-send-email-dwmw@amazon.co.uk> X-Mailer: git-send-email 2.7.4 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590114212368355702?= X-GMAIL-MSGID: =?utf-8?q?1590114212368355702?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: This is the basis for using the newly-added microcode features for speculation control on both Intel and AMD CPUs. We just add the CPUID feature bits (with associated cleanup now we were using 5 bits out of the same subleaf as "scattered" bits), add the MSR definitions, and turn off KPTI for Intel CPUs which say they don't need it. The rest of the bits to actually *use* the features are still being worked out, but this much is fairly straightforward so it's a good start. David Woodhouse (4): x86/cpufeatures: Add Intel feature bits for Speculation Control x86/cpufeatures: Add AMD feature bits for Prediction Command x86/msr: Add definitions for new speculation control MSRs x86/pti: Do not enable PTI on fixed Intel processors arch/x86/include/asm/cpufeature.h | 7 +++++-- arch/x86/include/asm/cpufeatures.h | 13 ++++++++++--- arch/x86/include/asm/disabled-features.h | 3 ++- arch/x86/include/asm/msr-index.h | 11 +++++++++++ arch/x86/include/asm/required-features.h | 3 ++- arch/x86/kernel/cpu/common.c | 10 ++++++++-- arch/x86/kernel/cpu/scattered.c | 3 +-- 7 files changed, 39 insertions(+), 11 deletions(-) -- 2.7.4