From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x227tiTKDyl1nDS3O0+HmmD17t8RGOj86ygx+0N/8Ei4qkfxiCumckuj9i29KbS9PjfpB51zE ARC-Seal: i=1; a=rsa-sha256; t=1516733530; cv=none; d=google.com; s=arc-20160816; b=zPwAz2CT8t8OmQI1lQH/wvG4iXkCQNk3NsSAV3rB3HMmxvz/VTDDiOvazlRS+occLR 95j4nGDN6CczbYohBjWvCCkVgVi4A0VLHoZ9SbRibWnaxRKWIy14hUjeyOH5DQsmOz4F chWyA9wdfqyo88anwtfYsR+JYokMDGqIwu6q1s9m2o3sqMAFOTsh5kJ+ZGzVmaTrc2bi VfeumhRe7iM5mS73V1uMiCZNVaoKimG21zIHsycpA+Ld9uQF9mqJjlXnYtr3AvXnlDW4 2PJUYMRxoQTtuH7pbJzS7Bho2TgjqopsxJ5EjzbFCwPeAHazxqGbHhI3VWRtONH/cMXJ WCfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=precedence:mime-version:accept-language:in-reply-to:references :message-id:date:thread-index:thread-topic:subject:cc:to:from :mime-version:dkim-signature:arc-authentication-results; bh=+IW5Ldn1dYH6pdpfIBmaTBsAbU9Wu8+GnuJwoPwqkZ8=; b=ZdYfUBMzivzPW9TWLQkMnDhxVJXvM4zoTAGr8XPh6KtUICnLEP7JjIjFU5tENjQi5B AkFvr+M//RC6v8W05SMqUsSW4Ze+4j/r2exUHxVB1Bed0NQCmLr5idaqYAbnBbcf0yCK i8JMeeNd1yli8UAv0qrCOo+0z2Dhzhd/HBeqBhOICpGxxjcEmcBcwbWTRCAMld07YT0N OYQlgjD0iFz0a1teHxfxPW549QGbvMaMcGTqOiu38mRKTHjAwXbEhae6J2OtbIjQDGvN +UgHYtGH1LOjqvfkxHSHVq27xYV9uVrJoDh8w4oA3MyU/HDwHuDBbirkJLjUBZ3qiEER iNGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amazon.co.uk header.s=amazon201209 header.b=vAyVUggs; spf=pass (google.com: domain of prvs=5548949a8=dwmw@amazon.co.uk designates 207.171.184.29 as permitted sender) smtp.mailfrom=prvs=5548949a8=dwmw@amazon.co.uk; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.co.uk Authentication-Results: mx.google.com; dkim=pass header.i=@amazon.co.uk header.s=amazon201209 header.b=vAyVUggs; spf=pass (google.com: domain of prvs=5548949a8=dwmw@amazon.co.uk designates 207.171.184.29 as permitted sender) smtp.mailfrom=prvs=5548949a8=dwmw@amazon.co.uk; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.co.uk X-Amazon-filename: smime.p7s X-IronPort-AV: E=Sophos;i="5.46,402,1511827200"; d="p7s'?scan'208";a="589213996" Content-Type: multipart/mixed; boundary="===============4869721489146712423==" MIME-Version: 1.0 From: "Woodhouse, David" To: "gregkh@linux-foundation.org" , "dave.hansen@intel.com" CC: "linux-kernel@vger.kernel.org" , "tim.c.chen@linux.intel.com" , "arjan@linux.intel.com" , "Raslan, KarimAllah" , "peterz@infradead.org" , "torvalds@linux-foundation.org" , "tglx@linutronix.de" , "ak@linux.intel.com" , "x86@kernel.org" , "pbonzini@redhat.com" , "bp@alien8.de" , "thomas.lendacky@amd.com" Subject: Re: [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs Thread-Topic: [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs Thread-Index: AQHTlHfXlJqj0pT8aU22fWhGIMp86KOBx72AgAAE+gA= Date: Tue, 23 Jan 2018 18:48:58 +0000 Message-ID: <1516733338.9521.166.camel@amazon.co.uk> References: <1516726375-25168-1-git-send-email-dwmw@amazon.co.uk> <1516726375-25168-5-git-send-email-dwmw@amazon.co.uk> <18ca2a5a-17df-e889-9c11-f5ee4c46de53@intel.com> <20180123183109.GA12453@kroah.com> In-Reply-To: <20180123183109.GA12453@kroah.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.43.61.91] MIME-Version: 1.0 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590402906790852679?= X-GMAIL-MSGID: =?utf-8?q?1590410379128626198?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: --===============4869721489146712423== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-256; protocol="application/x-pkcs7-signature"; boundary="=-nrRwvbw7mvlwGIlHMlfa" --=-nrRwvbw7mvlwGIlHMlfa Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2018-01-23 at 19:31 +0100, Greg KH wrote: > On Tue, Jan 23, 2018 at 10:27:24AM -0800, Dave Hansen wrote: > >=20 > > On 01/23/2018 08:52 AM, David Woodhouse wrote: > > >=20 > > > +#define MSR_IA32_ARCH_CAPABILITIES 0x0000010a > > > +#define ARCH_CAP_RDCL_NO (1 << 0)=C2=A0=C2=A0=C2=A0/* Not susceptib= le to Meltdown */ > > > +#define ARCH_CAP_IBRS_ALL (1 << 1)=C2=A0=C2=A0=C2=A0/* Enhanced IBR= S support */ > > Do we want to spell out the silly Intel acronym?=C2=A0=C2=A0I don't kno= w how we > > fit it on the right side, but I do think we need to do it _somewhere_. > > We need the code to stand on its own to some degree and not subject the > > masses to reading the spec to understand the code. > > Yes please, take pity on us :) The comment says 'Not susceptible to Meltdown', and it's used in a context where it disabled the X86_CPU_BUG_MELTDOWN bit. I think that's a *bit* of a hint about what it does. Expanding the silly Intel acronym doesn't give you any useful information except perhaps which pointless bits of word soup they happened to string together in the spec. --=-nrRwvbw7mvlwGIlHMlfa Content-Type: application/x-pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCEE4w ggUuMIIEFqADAgECAhEApEtL31g6H7ROXdOiQnA9RjANBgkqhkiG9w0BAQsFADCBlzELMAkGA1UE BhMCR0IxGzAZBgNVBAgTEkdyZWF0ZXIgTWFuY2hlc3RlcjEQMA4GA1UEBxMHU2FsZm9yZDEaMBgG A1UEChMRQ09NT0RPIENBIExpbWl0ZWQxPTA7BgNVBAMTNENPTU9ETyBSU0EgQ2xpZW50IEF1dGhl bnRpY2F0aW9uIGFuZCBTZWN1cmUgRW1haWwgQ0EwHhcNMTcxMjIxMDAwMDAwWhcNMTgxMjIxMjM1 OTU5WjAiMSAwHgYJKoZIhvcNAQkBFhFkd213QGFtYXpvbi5jby51azCCASIwDQYJKoZIhvcNAQEB BQADggEPADCCAQoCggEBAKdGKgXuwKMg2r+i/4BZZC0ddRxNq3xIKTakie/VCSzoO7P17A36ZzUc VMEYPfqDt/65xoc6Tdih+qkY2pNDppZ1DZ8mVrAX6O2O60ZhmXB60wMoDvXPZInvkMOW4drqnje/ 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