From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967021AbeBNJzW (ORCPT ); Wed, 14 Feb 2018 04:55:22 -0500 Received: from mail.kernel.org ([198.145.29.99]:46268 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966940AbeBNJzU (ORCPT ); Wed, 14 Feb 2018 04:55:20 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B341821782 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=kbingham@kernel.org From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Simon Horman , Laurent Pinchart , Kieran Bingham Cc: Kieran Bingham , Magnus Damm , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 2/5] arm64: dts: renesas: r8a77995: add VSP instances Date: Wed, 14 Feb 2018 09:55:05 +0000 Message-Id: <1518602108-1724-3-git-send-email-kbingham@kernel.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1518602108-1724-1-git-send-email-kbingham@kernel.org> References: <1518602108-1724-1-git-send-email-kbingham@kernel.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kieran Bingham The r8a77995 has a VSPBS to support image processing such as blending of two input images, and has two VSPDs to handle display pipelines with a DU. Signed-off-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- v2: - Fix VSPD register map size - Squash VSPBS and VSPD patches together v3: - Fix VSPBS register map size too :-) arch/arm64/boot/dts/renesas/r8a77995.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 196a917afea6..0db242114bc5 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -692,6 +692,16 @@ status = "disabled"; }; + vspbs: vsp@fe960000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe960000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 627>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 627>; + renesas,fcp = <&fcpvb0>; + }; + fcpvb0: fcp@fe96f000 { compatible = "renesas,fcpv"; reg = <0 0xfe96f000 0 0x200>; @@ -701,6 +711,16 @@ iommus = <&ipmmu_vp0 5>; }; + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 623>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 623>; + renesas,fcp = <&fcpvd0>; + }; + fcpvd0: fcp@fea27000 { compatible = "renesas,fcpv"; reg = <0 0xfea27000 0 0x200>; @@ -710,6 +730,16 @@ iommus = <&ipmmu_vi0 8>; }; + vspd1: vsp@fea80000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea28000 0 0x8000>; + interrupts = ; + clocks = <&cpg CPG_MOD 622>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 622>; + renesas,fcp = <&fcpvd1>; + }; + fcpvd1: fcp@fea2f000 { compatible = "renesas,fcpv"; reg = <0 0xfea2f000 0 0x200>; -- 2.7.4