From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935903AbeCHQy4 (ORCPT ); Thu, 8 Mar 2018 11:54:56 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:13443 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932076AbeCHQyv (ORCPT ); Thu, 8 Mar 2018 11:54:51 -0500 From: To: , Rob Herring , Mark Rutland , Lee Jones , Maxime Coquelin , Alexandre Torgue , Michael Turquette , Stephen Boyd , Gabriel Fernandez CC: , , , , , , Loic PALLARDY , benjamin GAIGNARD Subject: [PATCH v2 10/12] clk: stm32mp1: add RTC clock Date: Thu, 8 Mar 2018 17:54:03 +0100 Message-ID: <1520528045-18330-11-git-send-email-gabriel.fernandez@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520528045-18330-1-git-send-email-gabriel.fernandez@st.com> References: <1520528045-18330-1-git-send-email-gabriel.fernandez@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG4NODE2.st.com (10.75.127.11) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-03-08_09:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gabriel Fernandez This patch adds the RTC clock. Signed-off-by: Gabriel Fernandez --- drivers/clk/clk-stm32mp1.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c index b5379a2..51e3e76 100644 --- a/drivers/clk/clk-stm32mp1.c +++ b/drivers/clk/clk-stm32mp1.c @@ -248,6 +248,10 @@ "ck_dsi_phy", "pll4_p" }; +static const char * const rtc_src[] = { + "off", "ck_lse", "ck_lsi", "ck_hse_rtc" +}; + static const struct clk_div_table axi_div_table[] = { { 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 }, { 4, 4 }, { 5, 4 }, { 6, 4 }, { 7, 4 }, @@ -1945,6 +1949,17 @@ enum { _NO_GATE, _MMUX(M_ETHCK), _DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)), + + /* RTC clock */ + DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, + CLK_DIVIDER_ALLOW_ZERO), + + COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE | + CLK_SET_RATE_PARENT, + _GATE(RCC_BDCR, 20, 0), + _MUX(RCC_BDCR, 16, 2, 0), + _NO_DIV), + }; struct stm32_clock_match_data { -- 1.9.1