From: Michel Pollet <michel.pollet@bp.renesas.com>
To: linux-renesas-soc@vger.kernel.org, Simon Horman <horms@verge.net.au>
Cc: phil.edworthy@renesas.com,
"Michel Pollet" <buserror+upstream@gmail.com>,
"Michel Pollet" <michel.pollet@bp.renesas.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"Chen-Yu Tsai" <wens@csie.org>,
"Douglas Anderson" <dianders@chromium.org>,
"Andreas Färber" <afaerber@suse.de>,
"Rajendra Nayak" <rnayak@codeaurora.org>,
"Stefan Wahren" <stefan.wahren@i2se.com>,
"Frank Rowand" <frank.rowand@sony.com>,
"Carlo Caione" <carlo@endlessm.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/3] arm: shmobile: Add the R9A06G032 SMP enabler driver
Date: Tue, 5 Jun 2018 12:28:47 +0100 [thread overview]
Message-ID: <1528198148-23308-3-git-send-email-michel.pollet@bp.renesas.com> (raw)
In-Reply-To: <1528198148-23308-1-git-send-email-michel.pollet@bp.renesas.com>
The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it
requires a special enable method to get it started.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
---
arch/arm/mach-shmobile/Makefile | 1 +
arch/arm/mach-shmobile/smp-r9a06g032.c | 79 ++++++++++++++++++++++++++++++++++
2 files changed, 80 insertions(+)
create mode 100644 arch/arm/mach-shmobile/smp-r9a06g032.c
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 1939f52..d7fc98f 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -34,6 +34,7 @@ smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o
smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o
+smp-$(CONFIG_ARCH_R9A06G032) += smp-r9a06g032.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
# PM objects
diff --git a/arch/arm/mach-shmobile/smp-r9a06g032.c b/arch/arm/mach-shmobile/smp-r9a06g032.c
new file mode 100644
index 0000000..cd40e6e
--- /dev/null
+++ b/arch/arm/mach-shmobile/smp-r9a06g032.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * R9A06G032 Second CA7 enabler.
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ * Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>
+ * Derived from action,s500-smp
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/smp.h>
+
+/*
+ * The second CPU is parked in ROM at boot time. It requires waking it after
+ * writing an address into the BOOTADDR register of sysctrl.
+ *
+ * So the default value of the "cpu-release-addr" corresponds to BOOTADDR...
+ *
+ * *However* the BOOTADDR register is not available when the kernel
+ * starts in NONSEC mode.
+ *
+ * So for NONSEC mode, the bootloader re-parks the second CPU into a pen
+ * in SRAM, and changes the "cpu-release-addr" of linux's DT to a SRAM address,
+ * which is not restricted.
+ */
+
+static void __iomem *cpu_bootaddr;
+
+static DEFINE_SPINLOCK(cpu_lock);
+
+static int r9a06g032_smp_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ if (!cpu_bootaddr)
+ return -ENODEV;
+
+ spin_lock(&cpu_lock);
+
+ writel(__pa_symbol(secondary_startup), cpu_bootaddr);
+ arch_send_wakeup_ipi_mask(cpumask_of(cpu));
+
+ spin_unlock(&cpu_lock);
+
+ return 0;
+}
+
+static void __init r9a06g032_smp_prepare_cpus(unsigned int max_cpus)
+{
+ struct device_node *dn;
+ int ret;
+ u32 bootaddr;
+
+ dn = of_get_cpu_node(1, NULL);
+ if (!dn) {
+ pr_err("CPU#1: missing device tree node\n");
+ return;
+ }
+ /*
+ * Determine the address from which the CPU is polling.
+ * The bootloader *does* change this property
+ */
+ ret = of_property_read_u32(dn, "cpu-release-addr", &bootaddr);
+ of_node_put(dn);
+ if (ret) {
+ pr_err("CPU#1: invalid cpu-release-addr property\n");
+ return;
+ }
+ pr_info("CPU#1: cpu-release-addr %08x\n", bootaddr);
+
+ cpu_bootaddr = ioremap(bootaddr, sizeof(bootaddr));
+}
+
+static const struct smp_operations r9a06g032_smp_ops __initconst = {
+ .smp_prepare_cpus = r9a06g032_smp_prepare_cpus,
+ .smp_boot_secondary = r9a06g032_smp_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(r9a06g032_smp, "renesas,r9a06g032-smp", &r9a06g032_smp_ops);
--
2.7.4
next prev parent reply other threads:[~2018-06-05 11:34 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-05 11:28 [PATCH v4 0/3] Renesas R9A06G032 SMP enabler Michel Pollet
2018-06-05 11:28 ` [PATCH v4 1/3] dt-bindings: cpu: Add Renesas R9A06G032 SMP enable method Michel Pollet
2018-06-05 13:23 ` Geert Uytterhoeven
2018-06-06 8:47 ` Simon Horman
2018-06-05 11:28 ` Michel Pollet [this message]
2018-06-05 13:24 ` [PATCH v4 2/3] arm: shmobile: Add the R9A06G032 SMP enabler driver Geert Uytterhoeven
2018-06-05 17:34 ` Frank Rowand
2018-06-06 6:36 ` Michel Pollet
2018-06-06 19:30 ` Frank Rowand
2018-06-06 19:35 ` Rob Herring
2018-06-06 19:42 ` Geert Uytterhoeven
2018-06-06 20:28 ` Rob Herring
2018-06-06 21:31 ` Frank Rowand
2018-06-06 19:37 ` Florian Fainelli
2018-06-06 19:46 ` Geert Uytterhoeven
2018-06-06 21:48 ` Frank Rowand
2018-06-06 21:52 ` Frank Rowand
2018-06-07 6:59 ` Michel Pollet
2018-06-07 15:54 ` Rob Herring
2018-06-08 6:50 ` Michel Pollet
2018-06-08 8:47 ` Geert Uytterhoeven
2018-06-08 20:41 ` Rob Herring
2018-06-09 12:10 ` Geert Uytterhoeven
2018-06-05 11:28 ` [PATCH v4 3/3] ARM: dts: Renesas R9A06G032 SMP enable method Michel Pollet
2018-06-05 13:24 ` Geert Uytterhoeven
2018-06-05 13:24 ` Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1528198148-23308-3-git-send-email-michel.pollet@bp.renesas.com \
--to=michel.pollet@bp.renesas.com \
--cc=afaerber@suse.de \
--cc=buserror+upstream@gmail.com \
--cc=carlo@endlessm.com \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=f.fainelli@gmail.com \
--cc=frank.rowand@sony.com \
--cc=horms@verge.net.au \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=magnus.damm@gmail.com \
--cc=mark.rutland@arm.com \
--cc=phil.edworthy@renesas.com \
--cc=rnayak@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=stefan.wahren@i2se.com \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).