From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Rob Herring <robh@kernel.org>,
Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
mathieu.poirier@linaro.org, mike.leach@linaro.org,
Linu Cherian <lcherian@marvell.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH V2 06/11] dts: bindings: Document device tree bindings for ETE
Date: Mon, 25 Jan 2021 23:28:10 +0000 [thread overview]
Message-ID: <1528d7ce-6765-7adf-3e24-6da1a705331d@arm.com> (raw)
In-Reply-To: <9417218b-6eda-373b-a2cb-869089ffc7cd@arm.com>
On 1/25/21 10:20 PM, Suzuki K Poulose wrote:
> Hi Rob
>
> On 1/25/21 7:22 PM, Rob Herring wrote:
>> On Wed, Jan 13, 2021 at 09:48:13AM +0530, Anshuman Khandual wrote:
>>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>>>
>>> Document the device tree bindings for Embedded Trace Extensions.
>>> ETE can be connected to legacy coresight components and thus
>>> could optionally contain a connection graph as described by
>>> the CoreSight bindings.
>>>
>>> Cc: devicetree@vger.kernel.org
>>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>>> Cc: Mike Leach <mike.leach@linaro.org>
>>> Cc: Rob Herring <robh@kernel.org>
>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>>> ---
>>> Documentation/devicetree/bindings/arm/ete.yaml | 71 ++++++++++++++++++++++++++
>>> 1 file changed, 71 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/arm/ete.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/ete.yaml
>>> b/Documentation/devicetree/bindings/arm/ete.yaml
>>> new file mode 100644
>>> index 0000000..00e6a77
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/arm/ete.yaml
>>> @@ -0,0 +1,71 @@
>>> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
>>> +# Copyright 2021, Arm Ltd
>>> +%YAML 1.2
>>> +---
>>> +$id: "http://devicetree.org/schemas/arm/ete.yaml#"
>>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>>> +
>>> +title: ARM Embedded Trace Extensions
>>> +
>>> +maintainers:
>>> + - Suzuki K Poulose <suzuki.poulose@arm.com>
>>> + - Mathieu Poirier <mathieu.poirier@linaro.org>
>>> +
>>> +description: |
>>> + Arm Embedded Trace Extension(ETE) is a per CPU trace component that
>>> + allows tracing the CPU execution. It overlaps with the CoreSight ETMv4
>>> + architecture and has extended support for future architecture changes.
>>> + The trace generated by the ETE could be stored via legacy CoreSight
>>> + components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer
>>> + Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to
>>> + legacy CoreSight components, a node must be listed per instance, along
>>> + with any optional connection graph as per the coresight bindings.
>>> + See bindings/arm/coresight.txt.
>>> +
>>> +properties:
>>> + $nodename:
>>> + pattern: "^ete([0-9a-f]+)$"
>>> + compatible:
>>> + items:
>>> + - const: arm,embedded-trace-extension
>>> +
>>> + cpu:
>>
>> We use 'cpus' in a couple of other places, let's do that here for
>> consistency.
>
> This is following the existing CoreSight bindings for ETM. The same driver
> probes both. Also there can only ever be a single CPU for ete/etm. So, we
> would prefer to keep it aligned with the existing bindings to avoid causing
> confusion.
>
>>
>>> + description: |
>>> + Handle to the cpu this ETE is bound to.
>>> + $ref: /schemas/types.yaml#/definitions/phandle
>>> +
>>> + out-ports:
>>> + description: |
>>> + Out put connections from the ETE to legacy CoreSight trace bus.
>>
>> Output
>
> Will fix.
>
>>
>>> + $ref: /schemas/graph.yaml#/properties/ports
>>
>> You have to define what each 'port' is if there can be more than 1. If
>> there's only ever 1 then you just need 'port' though maybe all the
>> coresight bindings require 'out-ports'. And the port nodes need a $ref
>> to '/schemas/graph.yaml#/properties/port'.
>
> All CoreSight components require an out-ports and/or in-ports. The ETM/ETE
> always has one port, but must be under out-ports in line with the CoreSight
> bindings.
>
> Does this look more apt:
>
> out-ports:
> description: |
> Output connection from the ETE to legacy CoreSight trace bus.
> poperties:
> port:
> $ref: /schemas/graph.yaml#/properties/port
Correction, the above should be :
+ out-ports:
+ type: object
+ description: |
+ Output connections from the ETE to legacy CoreSight trace bus.
+ properties:
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
That works fine for me. Does that look fine ? Some day, we should convert the
coresight dt bindings to yaml and import the out-ports/in-ports from the scheme :-)
Cheers
Suzuki
next prev parent reply other threads:[~2021-01-25 23:30 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-13 4:18 [PATCH V2 00/11] arm64: coresight: Enable ETE and TRBE Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 01/11] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 02/11] coresight: Do not scan for graph if none is present Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 03/11] coresight: etm4x: Add support for PE OS lock Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 04/11] coresight: ete: Add support for ETE sysreg access Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 05/11] coresight: ete: Add support for ETE tracing Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 06/11] dts: bindings: Document device tree bindings for ETE Anshuman Khandual
2021-01-25 19:22 ` Rob Herring
2021-01-25 22:20 ` Suzuki K Poulose
2021-01-25 23:28 ` Suzuki K Poulose [this message]
2021-01-13 4:18 ` [PATCH V2 07/11] arm64: Add TRBE definitions Anshuman Khandual
2021-01-13 9:21 ` Suzuki K Poulose
2021-01-15 1:52 ` Anshuman Khandual
2021-02-22 13:55 ` Catalin Marinas
2021-02-22 13:59 ` Catalin Marinas
2021-01-13 4:18 ` [PATCH V2 08/11] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual
2021-01-13 9:43 ` Suzuki K Poulose
2021-01-15 2:36 ` Anshuman Khandual
2021-01-15 12:31 ` Suzuki K Poulose
2021-01-13 4:18 ` [PATCH V2 09/11] coresight: etm-perf: Truncate the perf record if handle has no space Anshuman Khandual
2021-01-13 9:48 ` Suzuki K Poulose
2021-01-13 4:18 ` [PATCH V2 10/11] coresight: sink: Add TRBE driver Anshuman Khandual
2021-01-13 15:28 ` Suzuki K Poulose
2021-01-15 5:29 ` Anshuman Khandual
2021-01-15 12:43 ` Suzuki K Poulose
2021-01-17 12:10 ` Anshuman Khandual
2021-01-13 4:18 ` [PATCH V2 11/11] dts: bindings: Document device tree bindings for Arm TRBE Anshuman Khandual
2021-01-13 15:45 ` Rob Herring
2021-01-14 10:17 ` Suzuki K Poulose
2021-01-14 14:07 ` Rob Herring
2021-01-14 14:47 ` Suzuki K Poulose
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