From: Mars Cheng <mars.cheng@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>,
CC Hwang <cc.hwang@mediatek.com>,
"Loda Chou" <loda.chou@mediatek.com>,
Miles Chen <miles.chen@mediatek.com>,
"Jades Shih" <jades.shih@mediatek.com>,
Yingjoe Chen <yingjoe.chen@mediatek.com>,
My Chuang <my.chuang@mediatek.com>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <wsd_upstream@mediatek.com>
Subject: Re: [PATCH 2/2] arm64: dts: mediatek: add mt6765 support
Date: Wed, 20 Jun 2018 08:18:07 +0800 [thread overview]
Message-ID: <1529453887.8701.0.camel@mtkswgap22> (raw)
In-Reply-To: <80bca2ae-eb08-3d6c-a863-140107286b2d@gmail.com>
Hi Matthias
On Fri, 2018-06-15 at 10:54 +0200, Matthias Brugger wrote:
>
> On 13/06/18 00:40, Mars Cheng wrote:
> > +
> > + uart0: serial@11002000 {
> > + compatible = "mediatek,mt6765-uart",
> > + "mediatek,mt6577-uart";
> > + reg = <0 0x11002000 0 0x400>;
> > + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&uart_clk>;
> > + status = "disabled";
> > + };
>
> You need "baud" and "bus" clock. Also add clock-names please.
Got it, will add them in V2
>
> > +
> > + uart1: serial@11003000 {
> > + compatible = "mediatek,mt6765-uart",
> > + "mediatek,mt6577-uart";
> > + reg = <0 0x11003000 0 0x400>;
> > + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&uart_clk>;
> > + status = "disabled";
>
> Same here obviously.
Will fixed in V2.
Thanks.
>
> Regards,
> Matthias
prev parent reply other threads:[~2018-06-20 0:18 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-12 22:40 Add basic SoC support for MT6765 Mars Cheng
2018-06-12 22:40 ` [PATCH 1/2] ndings: mediatek: Add bindings for mediatek MT6765 Platform Mars Cheng
2018-06-13 0:51 ` Rob Herring
2018-06-13 1:59 ` Mars Cheng
2018-06-12 22:40 ` [PATCH 2/2] arm64: dts: mediatek: add mt6765 support Mars Cheng
2018-06-13 0:58 ` Rob Herring
2018-06-13 1:56 ` Mars Cheng
2018-06-15 8:54 ` Matthias Brugger
2018-06-20 0:18 ` Mars Cheng [this message]
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