* [PATCH 0/2] Add basic SoC support for MT6765
@ 2018-06-26 2:04 Mars Cheng
2018-06-26 2:04 ` [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform Mars Cheng
2018-06-26 2:04 ` [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support Mars Cheng
0 siblings, 2 replies; 9+ messages in thread
From: Mars Cheng @ 2018-06-26 2:04 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, Marc Zyngier
Cc: CC Hwang, Loda Chou, Miles Chen, Jades Shih, Yingjoe Chen,
My Chuang, linux-kernel, linux-mediatek, devicetree,
wsd_upstream, linux-serial, linux-arm-kernel
This patch adds basic SoC support for Mediatek's new 8-core SoC,
MT6765, which is mainly for smartphone application.
Change in V2:
1. fix clk properties in uart dts node
2. fix typo in submit title
3. add simple-bus in mt6765.dtsi
4. use correct SPDX license format
Mars Cheng (2):
dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform
arm64: dts: mediatek: add mt6765 support
Documentation/devicetree/bindings/arm/mediatek.txt | 4 +
.../interrupt-controller/mediatek,sysirq.txt | 1 +
.../devicetree/bindings/serial/mtk-uart.txt | 1 +
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++
arch/arm64/boot/dts/mediatek/mt6765.dtsi | 158 ++++++++++++++++++++
6 files changed, 198 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform
2018-06-26 2:04 [PATCH 0/2] Add basic SoC support for MT6765 Mars Cheng
@ 2018-06-26 2:04 ` Mars Cheng
2018-07-03 22:11 ` Rob Herring
2018-06-26 2:04 ` [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support Mars Cheng
1 sibling, 1 reply; 9+ messages in thread
From: Mars Cheng @ 2018-06-26 2:04 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, Marc Zyngier
Cc: CC Hwang, Loda Chou, Miles Chen, Jades Shih, Yingjoe Chen,
My Chuang, linux-kernel, linux-mediatek, devicetree,
wsd_upstream, linux-serial, linux-arm-kernel, Mars Cheng
This adds dt-binding documentation for Mediatek MT6765. Only
include very basic items, gic, uart timer and cpu.
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
---
Documentation/devicetree/bindings/arm/mediatek.txt | 4 ++++
.../interrupt-controller/mediatek,sysirq.txt | 1 +
.../devicetree/bindings/serial/mtk-uart.txt | 1 +
3 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
index 7d21ab3..48fac4e 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek.txt
@@ -11,6 +11,7 @@ compatible: Must contain one of
"mediatek,mt6589"
"mediatek,mt6592"
"mediatek,mt6755"
+ "mediatek,mt6765"
"mediatek,mt6795"
"mediatek,mt6797"
"mediatek,mt7622"
@@ -41,6 +42,9 @@ Supported boards:
- Evaluation phone for MT6755(Helio P10):
Required root node properties:
- compatible = "mediatek,mt6755-evb", "mediatek,mt6755";
+- Evaluation board for MT6765(Helio P22):
+ Required root node properties:
+ - compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
- Evaluation board for MT6795(Helio X10):
Required root node properties:
- compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
index 07bf0b9..c8eda80 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
@@ -11,6 +11,7 @@ Required properties:
"mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
"mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
"mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
+ "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765
"mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755
"mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592
"mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index f73abff..742cb47 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -8,6 +8,7 @@ Required properties:
* "mediatek,mt6582-uart" for MT6582 compatible UARTS
* "mediatek,mt6589-uart" for MT6589 compatible UARTS
* "mediatek,mt6755-uart" for MT6755 compatible UARTS
+ * "mediatek,mt6765-uart" for MT6765 compatible UARTS
* "mediatek,mt6795-uart" for MT6795 compatible UARTS
* "mediatek,mt6797-uart" for MT6797 compatible UARTS
* "mediatek,mt7622-uart" for MT7622 compatible UARTS
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support
2018-06-26 2:04 [PATCH 0/2] Add basic SoC support for MT6765 Mars Cheng
2018-06-26 2:04 ` [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform Mars Cheng
@ 2018-06-26 2:04 ` Mars Cheng
2018-06-26 7:53 ` Marc Zyngier
2018-07-02 21:50 ` Rob Herring
1 sibling, 2 replies; 9+ messages in thread
From: Mars Cheng @ 2018-06-26 2:04 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, Marc Zyngier
Cc: CC Hwang, Loda Chou, Miles Chen, Jades Shih, Yingjoe Chen,
My Chuang, linux-kernel, linux-mediatek, devicetree,
wsd_upstream, linux-serial, linux-arm-kernel, Mars Cheng
This adds basic chip support for MT6765 SoC.
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++++
arch/arm64/boot/dts/mediatek/mt6765.dtsi | 158 +++++++++++++++++++++++++++
3 files changed, 192 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index ac17f60..7506b0d 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt6765-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt6765-evb.dts b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
new file mode 100644
index 0000000..36dddff2
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Mediatek MT6765
+ *
+ * (C) Copyright 2018. Mediatek, Inc.
+ *
+ * Mars Cheng <mars.cheng@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt6765.dtsi"
+
+/ {
+ model = "MediaTek MT6765 EVB";
+ compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x1e800000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
new file mode 100644
index 0000000..ab34c0f
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Mediatek MT6765
+ *
+ * (C) Copyright 2018. Mediatek, Inc.
+ *
+ * Mars Cheng <mars.cheng@mediatek.com>
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "mediatek,mt6765";
+ interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x000>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x001>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x002>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x003>;
+ };
+
+ cpu4: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x100>;
+ };
+
+ cpu5: cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x101>;
+ };
+
+ cpu6: cpu@102 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x102>;
+ };
+
+ cpu7: cpu@103 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ enable-method = "psci";
+ reg = <0x103>;
+ };
+ };
+
+ baud_clk: dummy26m {
+ compatible = "fixed-clock";
+ clock-frequency = <26000000>;
+ #clock-cells = <0>;
+ };
+
+ sys_clk: dummyclk {
+ compatible = "fixed-clock";
+ clock-frequency = <26000000>;
+ #clock-cells = <0>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ sysirq: intpol-controller@10200a80 {
+ compatible = "mediatek,mt6765-sysirq",
+ "mediatek,mt6577-sysirq";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ reg = <0 0x10200a80 0 0x50>;
+ };
+
+ gic: interrupt-controller@0c000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ #redistributor-regions = <1>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ reg = <0 0x0c000000 0 0x40000>, // distributor
+ <0 0x0c100000 0 0x200000>; // redistributor
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt6765-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x400>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&baud_clk>, <&sys_clk>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt6765-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x400>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&baud_clk>, <&sys_clk>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+ }; /* end of soc */
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support
2018-06-26 2:04 ` [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support Mars Cheng
@ 2018-06-26 7:53 ` Marc Zyngier
2018-06-26 11:23 ` Mars Cheng
2018-07-02 21:50 ` Rob Herring
1 sibling, 1 reply; 9+ messages in thread
From: Marc Zyngier @ 2018-06-26 7:53 UTC (permalink / raw)
To: Mars Cheng
Cc: Matthias Brugger, Rob Herring, CC Hwang, Loda Chou, Miles Chen,
Jades Shih, Yingjoe Chen, My Chuang, linux-kernel,
linux-mediatek, devicetree, wsd_upstream, linux-serial,
linux-arm-kernel
On Tue, 26 Jun 2018 03:04:06 +0100,
Mars Cheng <mars.cheng@mediatek.com> wrote:
>
> This adds basic chip support for MT6765 SoC.
>
> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++++
> arch/arm64/boot/dts/mediatek/mt6765.dtsi | 158 +++++++++++++++++++++++++++
> 3 files changed, 192 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> new file mode 100644
> index 0000000..ab34c0f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
[...]
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
GICv3 doesn't encode the PPI affinity in its interrupt specifiers (or
at least not this way). Please drop it.
> + };
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> +
> + sysirq: intpol-controller@10200a80 {
> + compatible = "mediatek,mt6765-sysirq",
> + "mediatek,mt6577-sysirq";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + interrupt-parent = <&gic>;
> + reg = <0 0x10200a80 0 0x50>;
> + };
> +
> + gic: interrupt-controller@0c000000 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + #redistributor-regions = <1>;
A single redistributor is the default, and you don't need to specify
it in the DT.
> + interrupt-parent = <&gic>;
> + interrupt-controller;
> + reg = <0 0x0c000000 0 0x40000>, // distributor
> + <0 0x0c100000 0 0x200000>; // redistributor
How about the GICv2 compatibility regions, which are provided by the
CPUs at a fixed offset from PERIPHBASE? See the Cortex-A53 TRM for
detail, and please add the missing regions.
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + };
Thanks,
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support
2018-06-26 7:53 ` Marc Zyngier
@ 2018-06-26 11:23 ` Mars Cheng
0 siblings, 0 replies; 9+ messages in thread
From: Mars Cheng @ 2018-06-26 11:23 UTC (permalink / raw)
To: Marc Zyngier
Cc: Matthias Brugger, Rob Herring, CC Hwang, Loda Chou, Miles Chen,
Jades Shih, Yingjoe Chen, My Chuang, linux-kernel,
linux-mediatek, devicetree, wsd_upstream, linux-serial,
linux-arm-kernel
Hi Marc
On Tue, 2018-06-26 at 08:53 +0100, Marc Zyngier wrote:
> On Tue, 26 Jun 2018 03:04:06 +0100,
> Mars Cheng <mars.cheng@mediatek.com> wrote:
> >
> > This adds basic chip support for MT6765 SoC.
> >
> > Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile | 1 +
> > arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++++
> > arch/arm64/boot/dts/mediatek/mt6765.dtsi | 158 +++++++++++++++++++++++++++
> > 3 files changed, 192 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> > new file mode 100644
> > index 0000000..ab34c0f
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
>
> [...]
>
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupt-parent = <&gic>;
> > + interrupts = <GIC_PPI 13
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>
> GICv3 doesn't encode the PPI affinity in its interrupt specifiers (or
> at least not this way). Please drop it.
Got it, will fix it.
>
> > + };
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + compatible = "simple-bus";
> > + ranges;
> > +
> > + sysirq: intpol-controller@10200a80 {
> > + compatible = "mediatek,mt6765-sysirq",
> > + "mediatek,mt6577-sysirq";
> > + interrupt-controller;
> > + #interrupt-cells = <3>;
> > + interrupt-parent = <&gic>;
> > + reg = <0 0x10200a80 0 0x50>;
> > + };
> > +
> > + gic: interrupt-controller@0c000000 {
> > + compatible = "arm,gic-v3";
> > + #interrupt-cells = <3>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + #redistributor-regions = <1>;
>
> A single redistributor is the default, and you don't need to specify
> it in the DT.
>
sure, it's really unnecessary. will remove it.
> > + interrupt-parent = <&gic>;
> > + interrupt-controller;
> > + reg = <0 0x0c000000 0 0x40000>, // distributor
> > + <0 0x0c100000 0 0x200000>; // redistributor
>
> How about the GICv2 compatibility regions, which are provided by the
> CPUs at a fixed offset from PERIPHBASE? See the Cortex-A53 TRM for
> detail, and please add the missing regions.
>
Thanks. will add it soon.
> > + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > + };
>
> Thanks,
>
> M.
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support
2018-06-26 2:04 ` [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support Mars Cheng
2018-06-26 7:53 ` Marc Zyngier
@ 2018-07-02 21:50 ` Rob Herring
2018-07-04 0:29 ` Mars Cheng
1 sibling, 1 reply; 9+ messages in thread
From: Rob Herring @ 2018-07-02 21:50 UTC (permalink / raw)
To: Mars Cheng
Cc: Matthias Brugger, Marc Zyngier, CC Hwang, Loda Choui, Miles Chen,
Jades Shih, Yingjoe Chen, My Chuang, linux-kernel,
linux-mediatek, devicetree, wsd_upstream,
open list:SERIAL DRIVERS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
On Mon, Jun 25, 2018 at 8:04 PM Mars Cheng <mars.cheng@mediatek.com> wrote:
>
> This adds basic chip support for MT6765 SoC.
>
> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++++
> arch/arm64/boot/dts/mediatek/mt6765.dtsi | 158 +++++++++++++++++++++++++++
> 3 files changed, 192 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index ac17f60..7506b0d 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6765-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765-evb.dts b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> new file mode 100644
> index 0000000..36dddff2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Mediatek MT6765
> + *
> + * (C) Copyright 2018. Mediatek, Inc.
> + *
> + * Mars Cheng <mars.cheng@mediatek.com>
> + */
> +
> +/dts-v1/;
> +#include "mt6765.dtsi"
> +
> +/ {
> + model = "MediaTek MT6765 EVB";
> + compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0 0x40000000 0 0x1e800000>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:921600n8";
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> new file mode 100644
> index 0000000..ab34c0f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> @@ -0,0 +1,158 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Mediatek MT6765
> + *
> + * (C) Copyright 2018. Mediatek, Inc.
> + *
> + * Mars Cheng <mars.cheng@mediatek.com>
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> + compatible = "mediatek,mt6765";
> + interrupt-parent = <&sysirq>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
Really need labels for cpu nodes?
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x000>;
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x001>;
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x002>;
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x003>;
> + };
> +
> + cpu4: cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x100>;
> + };
> +
> + cpu5: cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x101>;
> + };
> +
> + cpu6: cpu@102 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x102>;
> + };
> +
> + cpu7: cpu@103 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + enable-method = "psci";
> + reg = <0x103>;
> + };
> + };
> +
> + baud_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> +
> + sys_clk: dummyclk {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> +
> + sysirq: intpol-controller@10200a80 {
interrupt-controller@...
> + compatible = "mediatek,mt6765-sysirq",
> + "mediatek,mt6577-sysirq";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + interrupt-parent = <&gic>;
> + reg = <0 0x10200a80 0 0x50>;
> + };
> +
> + gic: interrupt-controller@0c000000 {
Drop the leading 0. Build your dts with W=12 and fix the warnings like this.
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + #redistributor-regions = <1>;
> + interrupt-parent = <&gic>;
> + interrupt-controller;
> + reg = <0 0x0c000000 0 0x40000>, // distributor
> + <0 0x0c100000 0 0x200000>; // redistributor
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + uart0: serial@11002000 {
> + compatible = "mediatek,mt6765-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11002000 0 0x400>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&baud_clk>, <&sys_clk>;
> + clock-names = "baud", "bus";
> + status = "disabled";
> + };
> +
> + uart1: serial@11003000 {
> + compatible = "mediatek,mt6765-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11003000 0 0x400>;
> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&baud_clk>, <&sys_clk>;
> + clock-names = "baud", "bus";
> + status = "disabled";
> + };
> + }; /* end of soc */
> +};
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform
2018-06-26 2:04 ` [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform Mars Cheng
@ 2018-07-03 22:11 ` Rob Herring
2018-07-04 0:24 ` Mars Cheng
0 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2018-07-03 22:11 UTC (permalink / raw)
To: Mars Cheng
Cc: Matthias Brugger, Marc Zyngier, CC Hwang, Loda Chou, Miles Chen,
Jades Shih, Yingjoe Chen, My Chuang, linux-kernel,
linux-mediatek, devicetree, wsd_upstream, linux-serial,
linux-arm-kernel
On Tue, Jun 26, 2018 at 10:04:05AM +0800, Mars Cheng wrote:
> This adds dt-binding documentation for Mediatek MT6765. Only
> include very basic items, gic, uart timer and cpu.
>
> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 4 ++++
> .../interrupt-controller/mediatek,sysirq.txt | 1 +
> .../devicetree/bindings/serial/mtk-uart.txt | 1 +
These can all go thru different trees, so should be split.
> 3 files changed, 6 insertions(+)
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform
2018-07-03 22:11 ` Rob Herring
@ 2018-07-04 0:24 ` Mars Cheng
0 siblings, 0 replies; 9+ messages in thread
From: Mars Cheng @ 2018-07-04 0:24 UTC (permalink / raw)
To: Rob Herring
Cc: Matthias Brugger, Marc Zyngier, CC Hwang, Loda Chou, Miles Chen,
Jades Shih, Yingjoe Chen, My Chuang, linux-kernel,
linux-mediatek, devicetree, wsd_upstream, linux-serial,
linux-arm-kernel
Hi Rob
On Tue, 2018-07-03 at 16:11 -0600, Rob Herring wrote:
> On Tue, Jun 26, 2018 at 10:04:05AM +0800, Mars Cheng wrote:
> > This adds dt-binding documentation for Mediatek MT6765. Only
> > include very basic items, gic, uart timer and cpu.
> >
> > Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> > ---
> > Documentation/devicetree/bindings/arm/mediatek.txt | 4 ++++
> > .../interrupt-controller/mediatek,sysirq.txt | 1 +
> > .../devicetree/bindings/serial/mtk-uart.txt | 1 +
>
> These can all go thru different trees, so should be split.
>
Got it, will split them.
> > 3 files changed, 6 insertions(+)
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support
2018-07-02 21:50 ` Rob Herring
@ 2018-07-04 0:29 ` Mars Cheng
0 siblings, 0 replies; 9+ messages in thread
From: Mars Cheng @ 2018-07-04 0:29 UTC (permalink / raw)
To: Rob Herring
Cc: Matthias Brugger, Marc Zyngier, CC Hwang, Loda Choui, Miles Chen,
Jades Shih, Yingjoe Chen, My Chuang, linux-kernel,
linux-mediatek, devicetree, wsd_upstream,
open list:SERIAL DRIVERS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Rob
On Mon, 2018-07-02 at 15:50 -0600, Rob Herring wrote:
> On Mon, Jun 25, 2018 at 8:04 PM Mars Cheng <mars.cheng@mediatek.com> wrote:
> >
> > This adds basic chip support for MT6765 SoC.
> >
> > Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile | 1 +
> > arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++++
> > arch/arm64/boot/dts/mediatek/mt6765.dtsi | 158 +++++++++++++++++++++++++++
> > 3 files changed, 192 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> > index ac17f60..7506b0d 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -1,6 +1,7 @@
> > # SPDX-License-Identifier: GPL-2.0
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6765-evb.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> > diff --git a/arch/arm64/boot/dts/mediatek/mt6765-evb.dts b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> > new file mode 100644
> > index 0000000..36dddff2
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> > @@ -0,0 +1,33 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * dts file for Mediatek MT6765
> > + *
> > + * (C) Copyright 2018. Mediatek, Inc.
> > + *
> > + * Mars Cheng <mars.cheng@mediatek.com>
> > + */
> > +
> > +/dts-v1/;
> > +#include "mt6765.dtsi"
> > +
> > +/ {
> > + model = "MediaTek MT6765 EVB";
> > + compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
> > +
> > + aliases {
> > + serial0 = &uart0;
> > + };
> > +
> > + memory@40000000 {
> > + device_type = "memory";
> > + reg = <0 0x40000000 0 0x1e800000>;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:921600n8";
> > + };
> > +};
> > +
> > +&uart0 {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> > new file mode 100644
> > index 0000000..ab34c0f
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> > @@ -0,0 +1,158 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * dts file for Mediatek MT6765
> > + *
> > + * (C) Copyright 2018. Mediatek, Inc.
> > + *
> > + * Mars Cheng <mars.cheng@mediatek.com>
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > + compatible = "mediatek,mt6765";
> > + interrupt-parent = <&sysirq>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + psci {
> > + compatible = "arm,psci-0.2";
> > + method = "smc";
> > + };
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
>
> Really need labels for cpu nodes?
>
Yes, I can drop them.
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x000>;
> > + };
> > +
> > + cpu1: cpu@1 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x001>;
> > + };
> > +
> > + cpu2: cpu@2 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x002>;
> > + };
> > +
> > + cpu3: cpu@3 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x003>;
> > + };
> > +
> > + cpu4: cpu@100 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x100>;
> > + };
> > +
> > + cpu5: cpu@101 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x101>;
> > + };
> > +
> > + cpu6: cpu@102 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x102>;
> > + };
> > +
> > + cpu7: cpu@103 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + enable-method = "psci";
> > + reg = <0x103>;
> > + };
> > + };
> > +
> > + baud_clk: dummy26m {
> > + compatible = "fixed-clock";
> > + clock-frequency = <26000000>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + sys_clk: dummyclk {
> > + compatible = "fixed-clock";
> > + clock-frequency = <26000000>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupt-parent = <&gic>;
> > + interrupts = <GIC_PPI 13
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10
> > + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> > + };
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + compatible = "simple-bus";
> > + ranges;
> > +
> > + sysirq: intpol-controller@10200a80 {
>
> interrupt-controller@...
My mistake, did not fix this in v2, will correct it.
>
> > + compatible = "mediatek,mt6765-sysirq",
> > + "mediatek,mt6577-sysirq";
> > + interrupt-controller;
> > + #interrupt-cells = <3>;
> > + interrupt-parent = <&gic>;
> > + reg = <0 0x10200a80 0 0x50>;
> > + };
> > +
> > + gic: interrupt-controller@0c000000 {
>
> Drop the leading 0. Build your dts with W=12 and fix the warnings like this.
Thanks for suggestion. Will avoid this kind of errors.
>
> > + compatible = "arm,gic-v3";
> > + #interrupt-cells = <3>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + #redistributor-regions = <1>;
> > + interrupt-parent = <&gic>;
> > + interrupt-controller;
> > + reg = <0 0x0c000000 0 0x40000>, // distributor
> > + <0 0x0c100000 0 0x200000>; // redistributor
> > + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > + uart0: serial@11002000 {
> > + compatible = "mediatek,mt6765-uart",
> > + "mediatek,mt6577-uart";
> > + reg = <0 0x11002000 0 0x400>;
> > + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&baud_clk>, <&sys_clk>;
> > + clock-names = "baud", "bus";
> > + status = "disabled";
> > + };
> > +
> > + uart1: serial@11003000 {
> > + compatible = "mediatek,mt6765-uart",
> > + "mediatek,mt6577-uart";
> > + reg = <0 0x11003000 0 0x400>;
> > + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&baud_clk>, <&sys_clk>;
> > + clock-names = "baud", "bus";
> > + status = "disabled";
> > + };
> > + }; /* end of soc */
> > +};
> > --
> > 1.7.9.5
> >
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-07-04 0:30 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-26 2:04 [PATCH 0/2] Add basic SoC support for MT6765 Mars Cheng
2018-06-26 2:04 ` [PATCH v2 1/2] dt-bindings: mediatek: Add bindings for mediatek MT6765 Platform Mars Cheng
2018-07-03 22:11 ` Rob Herring
2018-07-04 0:24 ` Mars Cheng
2018-06-26 2:04 ` [PATCH v2 2/2] arm64: dts: mediatek: add mt6765 support Mars Cheng
2018-06-26 7:53 ` Marc Zyngier
2018-06-26 11:23 ` Mars Cheng
2018-07-02 21:50 ` Rob Herring
2018-07-04 0:29 ` Mars Cheng
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