From: CK Hu <ck.hu@mediatek.com>
To: Stu Hsieh <stu.hsieh@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>,
<dri-devel@lists.freedesktop.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>
Subject: Re: [PATCH v1 06/15] drm/mediatek: add memory mode for RDMA
Date: Fri, 3 Aug 2018 15:30:12 +0800 [thread overview]
Message-ID: <1533281412.31144.23.camel@mtksdaap41> (raw)
In-Reply-To: <1533209786.11190.60.camel@mtksdccf07>
Hi, Stu:
On Thu, 2018-08-02 at 19:36 +0800, Stu Hsieh wrote:
> Hi, CK:
>
> On Wed, 2018-07-25 at 10:40 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > On Tue, 2018-07-24 at 16:17 +0800, Stu Hsieh wrote:
> > > This patch add memory mode for RDMA
> > >
> > > If use RDMA to read data from memory, it should set memory mode to RDMA
> > >
> > > Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
> > > ---
> > > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 16 +++++++++++++++-
> > > 1 file changed, 15 insertions(+), 1 deletion(-)
> > >
> >
> > [...]
> >
> > > static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp)
> > > @@ -111,7 +116,8 @@ static void mtk_rdma_start(struct mtk_ddp_comp *comp)
> > >
> > > static void mtk_rdma_stop(struct mtk_ddp_comp *comp)
> > > {
> > > - rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0);
> > > + writel(RDMA_SOFT_RESET, comp->regs + DISP_REG_RDMA_GLOBAL_CON);
> > > + writel(0, comp->regs + DISP_REG_RDMA_GLOBAL_CON);
> >
> > Without reset, what happen to dram mode? Why direct link mode need not
> > this reset?
> >
>
> There is nothing to happen, I would remove it.
>
> > > }
> > >
> > > static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
> > > @@ -121,10 +127,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
> > > unsigned int threshold;
> > > unsigned int reg;
> > > struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
> > > + bool *rdma_memory_mode = comp->comp_mode;
> > >
> > > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
> > > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height);
> > >
> > > + if (*rdma_memory_mode == true) {
> > > + rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xff0000,
> > > + MATRIX_INT_MTX_SEL_DEFAULT);
> > > + rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON,
> > > + RDMA_MODE_MEMORY, RDMA_MODE_MEMORY);
> > > + }
> > > +
> >
> > I would like this to be a kind of 'layer' config. In some SoC, one layer
> > of OVL could switch to direct link input or dram input. So I think it's
> > better to move this setting into some layer interface.
> >
> > Regards,
> > CK
> >
>
> If move it to layer_config, RDMA would not trigger interrupt.
> In the future, when cmdq patch upstream and accepted, this part can move
> to layer_config.
I don't know why interrupt would be influenced by moving this to layer
config? In mtk_crtc_ddp_hw_init(), call mtk_ddp_comp_config() first and
then call mtk_ddp_comp_layer_config() later. It's in almost the same
place.
Regards,
CK
>
> Regard,
> Stu
>
> > > /*
> > > * Enable FIFO underflow since DSI and DPI can't be blocked.
> > > * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> >
> >
>
>
next prev parent reply other threads:[~2018-08-03 7:30 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-24 8:17 [PATCH v1 00/15] Add RDMA memory mode support for mediatek SOC MT2712 Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 01/15] drm/mediatek: add connection from RDMA0 to DPI1 Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 02/15] drm/mediatek: add connection from RDMA0 to DSI1 Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 03/15] drm/mediatek: add connection from RDMA1 to DSI0 Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 04/15] drm/mediatek: add connection from RDMA2 " Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 05/15] drm/mediatek: add RDMA memory mode for crtc created Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 06/15] drm/mediatek: add memory mode for RDMA Stu Hsieh
2018-07-25 2:40 ` CK Hu
2018-08-02 11:36 ` Stu Hsieh
2018-08-03 7:30 ` CK Hu [this message]
2018-07-24 8:17 ` [PATCH v1 07/15] drm/mediatek: add layer config to set RDMA for plane setting Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 08/15] drm/mediatek: add RGB color format support for RDMA Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 09/15] drm/mediatek: add YUYV/UYVY " Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 10/15] drm/mediatek: add drm_device in RDMA for mamory mode to reaquest buffer Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 11/15] drm/mediatek: add dummy buffer for RDMA memory mode Stu Hsieh
2018-07-25 5:42 ` CK Hu
2018-08-02 11:45 ` Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 12/15] drm/mediatek: add layer number condition for RDMA to control plane Stu Hsieh
2018-07-25 3:02 ` CK Hu
2018-08-02 11:38 ` Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 13/15] drm/mediatek: Update some variable name from ovl to comp Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 14/15] drm/mediatek: fixed the error value for add DSI1 in mutex Stu Hsieh
2018-07-25 5:10 ` CK Hu
2018-08-02 11:39 ` Stu Hsieh
2018-07-24 8:17 ` [PATCH v1 15/15] drm/mediatek: fixed connection from RDMA2 to DSI1 Stu Hsieh
2018-07-25 1:39 ` [PATCH v1 00/15] Add RDMA memory mode support for mediatek SOC MT2712 CK Hu
2018-08-02 11:29 ` Stu Hsieh
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