From: Stu Hsieh <stu.hsieh@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>,
<dri-devel@lists.freedesktop.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>
Subject: Re: [PATCH v3 06/13] drm/mediatek: add RGB color format support for RDMA
Date: Tue, 7 Aug 2018 17:50:59 +0800 [thread overview]
Message-ID: <1533635459.11190.75.camel@mtksdccf07> (raw)
In-Reply-To: <1533610892.10818.10.camel@mtksdaap41>
Hi, CK:
On Tue, 2018-08-07 at 11:01 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Mon, 2018-08-06 at 19:58 +0800, Stu Hsieh wrote:
> > This patch add RGB color format support for RDMA,
> > including RGB565, RGB888, RGBA8888 and ARGB8888.
> >
> > Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 41 ++++++++++++++++++++++++++++++++
> > 1 file changed, 41 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > index 08866550740f..ba72d392dc27 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > @@ -35,6 +35,8 @@
> > #define DISP_REG_RDMA_SIZE_CON_0 0x0014
> > #define DISP_REG_RDMA_SIZE_CON_1 0x0018
> > #define DISP_REG_RDMA_TARGET_LINE 0x001c
> > +#define DISP_RDMA_MEM_CON 0x0024
> > +#define MEM_MODE_INPUT_SWAP BIT(8)
> > #define DISP_RDMA_MEM_SRC_PITCH 0x002c
> > #define DISP_RDMA_MEM_GMC_SETTING_0 0x0030
> > #define DISP_REG_RDMA_FIFO_CON 0x0040
> > @@ -46,6 +48,11 @@
> >
> > #define RDMA_MEM_GMC 0x40402020
> >
> > +#define MEM_MODE_INPUT_FORMAT_RGB565 0x0
> > +#define MEM_MODE_INPUT_FORMAT_RGB888 (0x001 << 4)
> > +#define MEM_MODE_INPUT_FORMAT_RGBA8888 (0x002 << 4)
> > +#define MEM_MODE_INPUT_FORMAT_ARGB8888 (0x003 << 4)
> > +
> > struct mtk_disp_rdma_data {
> > unsigned int fifo_size;
> > };
> > @@ -144,12 +151,46 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
> > writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
> > }
> >
> > +static unsigned int rdma_fmt_convert(struct mtk_disp_rdma *rdma,
> > + unsigned int fmt)
> > +{
> > + switch (fmt) {
> > + default:
> > + case DRM_FORMAT_RGB565:
> > + return MEM_MODE_INPUT_FORMAT_RGB565;
> > + case DRM_FORMAT_BGR565:
> > + return MEM_MODE_INPUT_FORMAT_RGB565 | MEM_MODE_INPUT_SWAP;
> > + case DRM_FORMAT_RGB888:
> > + return MEM_MODE_INPUT_FORMAT_RGB888;
> > + case DRM_FORMAT_BGR888:
> > + return MEM_MODE_INPUT_FORMAT_RGB888 | MEM_MODE_INPUT_SWAP;
> > + case DRM_FORMAT_RGBX8888:
> > + case DRM_FORMAT_RGBA8888:
> > + return MEM_MODE_INPUT_FORMAT_ARGB8888;
>
> I think the alphabet order of the naming reflect the dram order for each
> color. Of course, big-endian and little-endian would result in reversed
> naming order. I could not understand why RDMA use ARGB8888 naming for
> DRM RGBA8888. If the typo is from data sheet, I could just accept this
> typo and give an explain in driver because I want to align driver with
> data sheet.
>
> Regards,
> CK
>
OK, I would add the comment about this naming in driver rdma.c and ovl.c
Regard,
Stu
> > + case DRM_FORMAT_BGRX8888:
> > + case DRM_FORMAT_BGRA8888:
> > + return MEM_MODE_INPUT_FORMAT_ARGB8888 | MEM_MODE_INPUT_SWAP;
> > + case DRM_FORMAT_XRGB8888:
> > + case DRM_FORMAT_ARGB8888:
> > + return MEM_MODE_INPUT_FORMAT_RGBA8888;
> > + case DRM_FORMAT_XBGR8888:
> > + case DRM_FORMAT_ABGR8888:
> > + return MEM_MODE_INPUT_FORMAT_RGBA8888 | MEM_MODE_INPUT_SWAP;
> > + }
> > +}
> > +
> > static void mtk_rdma_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
> > struct mtk_plane_state *state)
> > {
> > + struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
> > struct mtk_plane_pending_state *pending = &state->pending;
> > unsigned int addr = pending->addr;
> > unsigned int pitch = pending->pitch & 0xffff;
> > + unsigned int fmt = pending->format;
> > + unsigned int con;
> > +
> > + con = rdma_fmt_convert(rdma, fmt);
> > + writel_relaxed(con, comp->regs + DISP_RDMA_MEM_CON);
> >
> > writel_relaxed(addr, comp->regs + DISP_RDMA_MEM_START_ADDR);
> > writel_relaxed(pitch, comp->regs + DISP_RDMA_MEM_SRC_PITCH);
>
>
next prev parent reply other threads:[~2018-08-07 9:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-06 11:58 [PATCH v3 00/13] Add RDMA memory mode support for mediatek SOC MT2712 Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 01/13] drm/mediatek: add connection from RDMA0 to DPI1 Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 02/13] drm/mediatek: add connection from RDMA0 to DSI1 Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 03/13] drm/mediatek: add connection from RDMA1 to DSI0 Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 04/13] drm/mediatek: add connection from RDMA2 " Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 05/13] drm/mediatek: add memory mode and layer_config for RDMA Stu Hsieh
2018-08-07 2:37 ` CK Hu
2018-08-06 11:58 ` [PATCH v3 06/13] drm/mediatek: add RGB color format support " Stu Hsieh
2018-08-07 3:01 ` CK Hu
2018-08-07 9:50 ` Stu Hsieh [this message]
2018-08-06 11:58 ` [PATCH v3 07/13] drm/mediatek: add YUYV/UYVY " Stu Hsieh
2018-08-07 3:33 ` CK Hu
2018-08-07 9:49 ` Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 08/13] drm/mediatek: add function to get layer number for component Stu Hsieh
2018-08-07 3:37 ` CK Hu
2018-08-06 11:58 ` [PATCH v3 09/13] drm/mediatek: add callback function to return OVL layer number Stu Hsieh
2018-08-07 3:47 ` CK Hu
2018-08-06 11:58 ` [PATCH v3 10/13] drm/mediatek: add callback function to return RDMA " Stu Hsieh
2018-08-07 3:47 ` CK Hu
2018-08-06 11:58 ` [PATCH v3 11/13] drm/mediatek: use layer_nr function to get layer number to init plane Stu Hsieh
2018-08-07 4:32 ` CK Hu
2018-08-07 9:51 ` Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 12/13] drm/mediatek: update some variable name from ovl to comp Stu Hsieh
2018-08-06 11:58 ` [PATCH v3 13/13] drm/mediatek: fix connection from RDMA2 to DSI1 Stu Hsieh
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