From: sunil.kovvuri@gmail.com
To: linux-kernel@vger.kernel.org, arnd@arndb.de, olof@lixom.net
Cc: linux-arm-kernel@lists.infradead.org, linux-soc@vger.kernel.org,
andrew@lunn.ch, davem@davemloft.net,
Sunil Goutham <sgoutham@marvell.com>
Subject: [PATCH v2 00/15] soc: octeontx2: Add RVU admin function driver
Date: Tue, 4 Sep 2018 17:24:35 +0530 [thread overview]
Message-ID: <1536062090-30446-1-git-send-email-sunil.kovvuri@gmail.com> (raw)
From: Sunil Goutham <sgoutham@marvell.com>
Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC supports
multiple PCIe SRIOV physical functions (PFs) and virtual functions (VFs).
PF0 is called administrative / admin function (AF) and has privilege access
to registers to provision different RVU functional blocks to each of
PF/VF.
This admin function (AF) driver acts as a configuration / administrative
software which provisions functional blocks to a PF/VF on demand for them
to work as one of the following
- A basic network controller (i.e NIC).
- NIC with packet filtering, shaping and scheduling capabilities.
- A crypto device.
- A combination of above etc.
PF/VFs communicate with admin function via a shared memory region.
This patch series adds logic for the following
- RVU AF driver with functional blocks provisioning support
- Mailbox infrastructure for communication between AF and PFs.
- CGX driver which provides information about physcial network
interfaces which AF processes and forwards required info to
PF/VF drivers.
This is the first set of patches out of 70 odd patches.
Note: This driver neither receives any data nor processes it i.e no I/O,
just does the hardware configuration.
Changes from v1:
1 Merged RVU admin function and CGX drivers into a single module
- Suggested by Arnd Bergmann
2 Pulled mbox communication APIs into a separate module to remove
admin function driver dependency in a VM where AF is not attached.
- Suggested by Arnd Bergmann
Aleksey Makarov (2):
soc: octeontx2: Add mailbox support infra
soc: octeontx2: Convert mbox msg id check to a macro
Geetha sowjanya (1):
soc: octeontx2: Reconfig MSIX base with IOVA
Linu Cherian (3):
soc: octeontx2: Set RVU PFs to CGX LMACs mapping
soc: octeontx2: Add support for CGX link management
soc: octeontx2: Register for CGX lmac events
Sunil Goutham (9):
soc: octeontx2: Add Marvell OcteonTX2 RVU AF driver
soc: octeontx2: Reset all RVU blocks
soc: octeontx2: Gather RVU blocks HW info
soc: octeontx2: Add mailbox IRQ and msg handlers
soc: octeontx2: Scan blocks for LFs provisioned to PF/VF
soc: octeontx2: Add RVU block LF provisioning support
soc: octeontx2: Configure block LF's MSIX vector offset
soc: octeontx2: Add Marvell OcteonTX2 CGX driver
MAINTAINERS: Add entry for Marvell OcteonTX2 Admin Function driver
MAINTAINERS | 10 +
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/marvell/Kconfig | 18 +
drivers/soc/marvell/Makefile | 2 +
drivers/soc/marvell/octeontx2/Makefile | 10 +
drivers/soc/marvell/octeontx2/cgx.c | 517 +++++++++
drivers/soc/marvell/octeontx2/cgx.h | 65 ++
drivers/soc/marvell/octeontx2/cgx_fw_if.h | 225 ++++
drivers/soc/marvell/octeontx2/mbox.c | 303 +++++
drivers/soc/marvell/octeontx2/mbox.h | 211 ++++
drivers/soc/marvell/octeontx2/rvu.c | 1637 ++++++++++++++++++++++++++++
drivers/soc/marvell/octeontx2/rvu.h | 158 +++
drivers/soc/marvell/octeontx2/rvu_cgx.c | 194 ++++
drivers/soc/marvell/octeontx2/rvu_reg.h | 442 ++++++++
drivers/soc/marvell/octeontx2/rvu_struct.h | 78 ++
16 files changed, 3872 insertions(+)
create mode 100644 drivers/soc/marvell/Kconfig
create mode 100644 drivers/soc/marvell/Makefile
create mode 100644 drivers/soc/marvell/octeontx2/Makefile
create mode 100644 drivers/soc/marvell/octeontx2/cgx.c
create mode 100644 drivers/soc/marvell/octeontx2/cgx.h
create mode 100644 drivers/soc/marvell/octeontx2/cgx_fw_if.h
create mode 100644 drivers/soc/marvell/octeontx2/mbox.c
create mode 100644 drivers/soc/marvell/octeontx2/mbox.h
create mode 100644 drivers/soc/marvell/octeontx2/rvu.c
create mode 100644 drivers/soc/marvell/octeontx2/rvu.h
create mode 100644 drivers/soc/marvell/octeontx2/rvu_cgx.c
create mode 100644 drivers/soc/marvell/octeontx2/rvu_reg.h
create mode 100644 drivers/soc/marvell/octeontx2/rvu_struct.h
--
2.7.4
next reply other threads:[~2018-09-04 11:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-04 11:54 sunil.kovvuri [this message]
2018-09-04 11:54 ` [PATCH v2 01/15] soc: octeontx2: Add Marvell OcteonTX2 RVU AF driver sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 02/15] soc: octeontx2: Reset all RVU blocks sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 03/15] soc: octeontx2: Gather RVU blocks HW info sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 04/15] soc: octeontx2: Add mailbox support infra sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 05/15] soc: octeontx2: Add mailbox IRQ and msg handlers sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 06/15] soc: octeontx2: Convert mbox msg id check to a macro sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 07/15] soc: octeontx2: Scan blocks for LFs provisioned to PF/VF sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 08/15] soc: octeontx2: Add RVU block LF provisioning support sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 09/15] soc: octeontx2: Configure block LF's MSIX vector offset sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 10/15] soc: octeontx2: Reconfig MSIX base with IOVA sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 11/15] soc: octeontx2: Add Marvell OcteonTX2 CGX driver sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 12/15] soc: octeontx2: Set RVU PFs to CGX LMACs mapping sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 13/15] soc: octeontx2: Add support for CGX link management sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 14/15] soc: octeontx2: Register for CGX lmac events sunil.kovvuri
2018-09-04 11:54 ` [PATCH v2 15/15] MAINTAINERS: Add entry for Marvell OcteonTX2 Admin Function driver sunil.kovvuri
2018-09-04 12:46 ` [PATCH v2 00/15] soc: octeontx2: Add RVU admin function driver Andrew Lunn
2018-09-04 16:14 ` Sunil Kovvuri
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1536062090-30446-1-git-send-email-sunil.kovvuri@gmail.com \
--to=sunil.kovvuri@gmail.com \
--cc=andrew@lunn.ch \
--cc=arnd@arndb.de \
--cc=davem@davemloft.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
--cc=olof@lixom.net \
--cc=sgoutham@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).