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From: Atish Patra <atish.patra@wdc.com>
To: palmer@sifive.com, linux-riscv@lists.infradead.org,
	hch@infradead.org, anup@brainfault.org
Cc: mark.rutland@arm.com, atish.patra@wdc.com, tglx@linutronix.de,
	linux-kernel@vger.kernel.org, Damien.LeMoal@wdc.com,
	marc.zyngier@arm.com, jeremy.linton@arm.com,
	gregkh@linuxfoundation.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, dmitriy@oss-tech.org,
	ard.biesheuvel@linaro.org, schwab@linux-m68k.org
Subject: [PATCH v5 07/12] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Date: Thu, 13 Sep 2018 11:37:00 -0700	[thread overview]
Message-ID: <1536863825-66808-8-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1536863825-66808-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

It's a bit confusing exactly what this function does: it actually
returns the hartid of an OF processor node, failing with -1 on invalid
nodes.  I've changed the name to _hartid() in order to make that a bit
more clear, as well as adding a comment.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/processor.h | 2 +-
 arch/riscv/kernel/cpu.c            | 7 +++++--
 arch/riscv/kernel/smpboot.c        | 2 +-
 drivers/clocksource/riscv_timer.c  | 2 +-
 drivers/irqchip/irq-sifive-plic.c  | 2 +-
 5 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
index 3fe4af81..50de774d 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -88,7 +88,7 @@ static inline void wait_for_interrupt(void)
 }
 
 struct device_node;
-extern int riscv_of_processor_hart(struct device_node *node);
+int riscv_of_processor_hartid(struct device_node *node);
 
 extern void riscv_fill_hwcap(void);
 
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 1c0bf662..4723e235 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -15,8 +15,11 @@
 #include <linux/seq_file.h>
 #include <linux/of.h>
 
-/* Return -1 if not a valid hart */
-int riscv_of_processor_hart(struct device_node *node)
+/*
+ * Returns the hart ID of the given device tree node, or -1 if the device tree
+ * node isn't a RISC-V hart.
+ */
+int riscv_of_processor_hartid(struct device_node *node)
 {
 	const char *isa, *status;
 	u32 hart;
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 670749ec..cfb0b02d 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -53,7 +53,7 @@ void __init setup_smp(void)
 	int hart, im_okay_therefore_i_am = 0;
 
 	while ((dn = of_find_node_by_type(dn, "cpu"))) {
-		hart = riscv_of_processor_hart(dn);
+		hart = riscv_of_processor_hartid(dn);
 		if (hart >= 0) {
 			set_cpu_possible(hart, true);
 			set_cpu_present(hart, true);
diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
index 4e8b347e..ad7453fc 100644
--- a/drivers/clocksource/riscv_timer.c
+++ b/drivers/clocksource/riscv_timer.c
@@ -84,7 +84,7 @@ void riscv_timer_interrupt(void)
 
 static int __init riscv_timer_init_dt(struct device_node *n)
 {
-	int cpu_id = riscv_of_processor_hart(n), error;
+	int cpu_id = riscv_of_processor_hartid(n), error;
 	struct clocksource *cs;
 
 	if (cpu_id != smp_processor_id())
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 532e9d68..c55eaa31 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -176,7 +176,7 @@ static int plic_find_hart_id(struct device_node *node)
 {
 	for (; node; node = node->parent) {
 		if (of_device_is_compatible(node, "riscv"))
-			return riscv_of_processor_hart(node);
+			return riscv_of_processor_hartid(node);
 	}
 
 	return -1;
-- 
2.7.4


  parent reply	other threads:[~2018-09-13 18:37 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-13 18:36 [PATCH v5 00/12] SMP cleanup and new features Atish Patra
2018-09-13 18:36 ` [PATCH v5 01/12] RISC-V: No need to pass scause as arg to do_IRQ() Atish Patra
2018-09-13 18:36 ` [PATCH v5 02/12] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Atish Patra
2018-09-13 18:36 ` [PATCH v5 03/12] RISC-V: Filter ISA and MMU values in cpuinfo Atish Patra
2018-09-13 18:36 ` [PATCH v5 04/12] RISC-V: Comment on the TLB flush in smp_callin() Atish Patra
2018-09-13 18:36 ` [PATCH v5 05/12] RISC-V: Disable preemption before enabling interrupts Atish Patra
2018-09-13 18:36 ` [PATCH v5 06/12] RISC-V: Provide a cleaner raw_smp_processor_id() Atish Patra
2018-09-13 18:37 ` Atish Patra [this message]
2018-09-13 18:37 ` [PATCH v5 08/12] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Atish Patra
2018-09-13 18:37 ` [PATCH v5 09/12] RISC-V: Use mmgrab() Atish Patra
2018-09-13 18:37 ` [PATCH v5 10/12] RISC-V: Use WRITE_ONCE instead of direct access Atish Patra
2018-09-13 18:37 ` [PATCH v5 11/12] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-09-13 18:37 ` [PATCH v5 12/12] RISC-V: Use Linux logical CPU number instead of hartid Atish Patra
2018-09-29  0:13 ` [PATCH v5 00/12] SMP cleanup and new features Palmer Dabbelt

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