From: Yang Yingliang <yangyingliang@huawei.com>
To: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: <yangyingliang@huawei.com>, <marc.zyngier@arm.com>,
<tglx@linutronix.de>, <guohanjun@huawei.com>
Subject: [PATCH 4/4] dt-bindings/irqchip/mbigen: add example of MBIGEN generate SPIs
Date: Tue, 16 Oct 2018 17:15:16 +0800 [thread overview]
Message-ID: <1539681316-19300-5-git-send-email-yangyingliang@huawei.com> (raw)
In-Reply-To: <1539681316-19300-1-git-send-email-yangyingliang@huawei.com>
Now MBIGEN can support to generate SPIs by writing
GICD_SETSPIR. Add dt example to help document.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
.../interrupt-controller/hisilicon,mbigen-v2.txt | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt
index a6813a0..298c033 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt
@@ -10,7 +10,7 @@ Hisilicon designed mbigen to collect and generate interrupt.
Non-pci devices can connect to mbigen and generate the
-interrupt by writing ITS register.
+interrupt by writing GICD or ITS register.
The mbigen chip and devices connect to mbigen have the following properties:
@@ -64,6 +64,13 @@ Examples:
num-pins = <2>;
#interrupt-cells = <2>;
};
+
+ mbigen_spi_example:spi_example {
+ interrupt-controller;
+ msi-parent = <&gic>;
+ num-pins = <2>;
+ #interrupt-cells = <2>;
+ };
};
Devices connect to mbigen required properties:
@@ -82,3 +89,11 @@ Examples:
interrupts = <656 1>,
<657 1>;
};
+
+ spi_example: spi0@0 {
+ compatible = "spi,example";
+ reg = <0 0 0 0>;
+ interrupt-parent = <&mbigen_spi_example>;
+ interrupts = <13 4>,
+ <14 4>;
+ };
--
1.8.3
prev parent reply other threads:[~2018-10-16 9:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-16 9:15 [PATCH 0/4] add support for MBIGEN generating message based SPIs Yang Yingliang
2018-10-16 9:15 ` [PATCH 1/4] irqchip/gic-v3-mbi: fix uninitialized mbi_lock Yang Yingliang
2018-10-16 9:15 ` [PATCH 2/4] irqchip/mbigen: rename register marcros Yang Yingliang
2018-10-16 9:15 ` [PATCH 3/4] irqchip/mbigen: add support for a MBIGEN generating SPIs Yang Yingliang
2018-10-17 16:30 ` Marc Zyngier
2018-10-18 3:41 ` Yang Yingliang
2018-10-18 8:55 ` Marc Zyngier
2018-10-18 11:20 ` Hanjun Guo
2018-10-18 11:56 ` Marc Zyngier
2018-10-18 12:54 ` Hanjun Guo
2018-10-16 9:15 ` Yang Yingliang [this message]
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