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From: AnilKumar Chimata <anilc@codeaurora.org>
To: andy.gross@linaro.org, david.brown@linaro.org,
	robh+dt@kernel.org, mark.rutland@arm.com,
	herbert@gondor.apana.org.au, davem@davemloft.net
Cc: linux-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	AnilKumar Chimata <anilc@codeaurora.org>
Subject: [PATCH 0/3] Add Inline Crypto Engine (ICE) driver
Date: Wed, 17 Oct 2018 20:47:53 +0530	[thread overview]
Message-ID: <1539789476-6098-1-git-send-email-anilc@codeaurora.org> (raw)

This patch series adds support for QualComm ICE driver which
is embedded in storage device such as UFS/eMMC.

ICE HW provides high throughputs, which meets the line speed
of storage devices. ICE works in bypass or non-bypass mode,
during bypass mode ICE does not perform any crypto operations
but in non-bypass mode ICE will perform encryption/decryption
based on the configuration.

ICE HW supports AES128/256 bit ECB & XTS mode algorithms, which
is used on many SoCs like msm8916, msm8996, msm8953, sdm845 and
many more MTPs from QualComm.

Also adds new functions to firmware driver which are needed to
request secure OS to restore ICE key config when device reset.

These patches have been tested on sdm845 MTP using some additional
patches (a) interconnect changes (b) ufs-ice interface driver
(c) dtsi changes for device init (d) kernel config changes. Once
these patches are accepted rest will be posted.

AnilKumar Chimata (3):
  firmware: qcom: scm: Update qcom_scm_call signature
  dt-bindings: Add ICE device specific parameters
  crypto: qce: ice: Add support for Inline Crypto Engine

 Documentation/crypto/msm/ice.txt                   |  235 +++
 .../devicetree/bindings/crypto/msm/ice.txt         |   34 +
 drivers/crypto/Kconfig                             |   10 +
 drivers/crypto/qce/Makefile                        |    1 +
 drivers/crypto/qce/ice.c                           | 1613 ++++++++++++++++++++
 drivers/crypto/qce/iceregs.h                       |  159 ++
 drivers/firmware/qcom_scm-32.c                     |   30 +-
 drivers/firmware/qcom_scm-64.c                     |   77 +-
 drivers/firmware/qcom_scm.c                        |    8 +-
 drivers/firmware/qcom_scm.h                        |    5 +-
 include/crypto/ice.h                               |   80 +
 include/linux/qcom_scm.h                           |    5 +
 12 files changed, 2213 insertions(+), 44 deletions(-)
 create mode 100644 Documentation/crypto/msm/ice.txt
 create mode 100644 Documentation/devicetree/bindings/crypto/msm/ice.txt
 create mode 100644 drivers/crypto/qce/ice.c
 create mode 100644 drivers/crypto/qce/iceregs.h
 create mode 100644 include/crypto/ice.h

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


             reply	other threads:[~2018-10-17 15:18 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-17 15:17 AnilKumar Chimata [this message]
2018-10-17 15:17 ` [PATCH 1/3] firmware: qcom: scm: Update qcom_scm_call signature AnilKumar Chimata
2018-10-17 15:17 ` [PATCH 2/3] dt-bindings: Add ICE device specific parameters AnilKumar Chimata
2018-10-25 18:15   ` Rob Herring
2018-10-29 13:30     ` AnilKumar Chimata
2018-10-17 15:17 ` [PATCH 3/3] crypto: qce: ice: Add support for Inline Crypto Engine AnilKumar Chimata
2018-10-17 17:04   ` Theodore Y. Ts'o
2018-10-24 12:04     ` AnilKumar Chimata
2018-10-17 17:39   ` Randy Dunlap
2018-10-24 14:43     ` AnilKumar Chimata
2018-10-18 11:43   ` kbuild test robot
2018-10-24 11:14     ` anilc
2018-10-25 14:58       ` Rob Herring
2018-10-29 13:31         ` AnilKumar Chimata
2018-10-25 14:55   ` Rob Herring
2018-10-25 15:28     ` Theodore Y. Ts'o
2018-10-25 15:45       ` Rob Herring
2018-10-29 13:47       ` AnilKumar Chimata

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