From: <shun-chih.yu@mediatek.com>
To: Sean Wang <sean.wang@mediatek.com>, Vinod Koul <vkoul@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: <dmaengine@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<srv_wsdupstream@mediatek.com>
Subject: [PATCH v3] add support for Mediatek Command-Queue DMA controller on MT6765 SoC
Date: Thu, 18 Oct 2018 15:49:09 +0800 [thread overview]
Message-ID: <1539848951-14798-1-git-send-email-shun-chih.yu@mediatek.com> (raw)
Changes since v2:
- fix build warning for kernel with DMA address in 32-bit
Changes since v1:
- remove unused macros, typos
- leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list
Shun-Chih Yu (2):
dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller
bindings
dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for
MT6765 SoC
.../devicetree/bindings/dma/mtk-cqdma.txt | 31 +
drivers/dma/mediatek/Kconfig | 13 +
drivers/dma/mediatek/Makefile | 1 +
drivers/dma/mediatek/mtk-cqdma.c | 951 ++++++++++++++++++++
4 files changed, 996 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/mtk-cqdma.txt
create mode 100644 drivers/dma/mediatek/mtk-cqdma.c
next reply other threads:[~2018-10-18 7:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-18 7:49 shun-chih.yu [this message]
2018-10-18 7:49 ` [PATCH 1/2] dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller bindings shun-chih.yu
2018-10-18 7:49 ` [PATCH 2/2] dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC shun-chih.yu
2018-11-11 10:19 ` Vinod Koul
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