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([2620:15c:2cd:203:5cdc:422c:7b28:ebb5]) by smtp.gmail.com with ESMTPSA id f18-v6sm82813247pfh.0.2018.11.05.16.01.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 05 Nov 2018 16:01:07 -0800 (PST) Message-ID: <1541462466.196084.163.camel@acm.org> Subject: Re: [PATCH] slab.h: Avoid using & for logical and of booleans From: Bart Van Assche To: Alexander Duyck Cc: linux@rasmusvillemoes.dk, Andrew Morton , LKML , Vlastimil Babka , Mel Gorman , Christoph Lameter , guro@fb.com, Pekka Enberg , David Rientjes , Joonsoo Kim , linux-mm Date: Mon, 05 Nov 2018 16:01:06 -0800 In-Reply-To: References: <20181105204000.129023-1-bvanassche@acm.org> <20181105131305.574d85469f08a4b76592feb6@linux-foundation.org> <1541454489.196084.157.camel@acm.org> <1541457654.196084.159.camel@acm.org> Content-Type: text/plain; charset="UTF-7" X-Mailer: Evolution 3.26.2-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2018-11-05 at 14:48 -0800, Alexander Duyck wrote: +AD4 On Mon, Nov 5, 2018 at 2:41 PM Bart Van Assche +ADw-bvanassche+AEA-acm.org+AD4 wrote: +AD4 +AD4 How about this version, still untested? My compiler is able to evaluate +AD4 +AD4 the switch expression if the argument is constant. +AD4 +AD4 +AD4 +AD4 static +AF8AXw-always+AF8-inline enum kmalloc+AF8-cache+AF8-type kmalloc+AF8-type(gfp+AF8-t flags) +AD4 +AD4 +AHs +AD4 +AD4 - int is+AF8-dma +AD0 0+ADs +AD4 +AD4 - int type+AF8-dma +AD0 0+ADs +AD4 +AD4 - int is+AF8-reclaimable+ADs +AD4 +AD4 +- unsigned int dr +AD0 +ACEAIQ(flags +ACY +AF8AXw-GFP+AF8-RECLAIMABLE)+ADs +AD4 +AD4 +AD4 +AD4 +ACM-ifdef CONFIG+AF8-ZONE+AF8-DMA +AD4 +AD4 - is+AF8-dma +AD0 +ACEAIQ(flags +ACY +AF8AXw-GFP+AF8-DMA)+ADs +AD4 +AD4 - type+AF8-dma +AD0 is+AF8-dma +ACo KMALLOC+AF8-DMA+ADs +AD4 +AD4 +- dr +AHwAPQ +ACEAIQ(flags +ACY +AF8AXw-GFP+AF8-DMA) +ADwAPA 1+ADs +AD4 +AD4 +ACM-endif +AD4 +AD4 +AD4 +AD4 - is+AF8-reclaimable +AD0 +ACEAIQ(flags +ACY +AF8AXw-GFP+AF8-RECLAIMABLE)+ADs +AD4 +AD4 - +AD4 +AD4 /+ACo +AD4 +AD4 +ACo If an allocation is both +AF8AXw-GFP+AF8-DMA and +AF8AXw-GFP+AF8-RECLAIMABLE, return +AD4 +AD4 +ACo KMALLOC+AF8-DMA and effectively ignore +AF8AXw-GFP+AF8-RECLAIMABLE +AD4 +AD4 +ACo-/ +AD4 +AD4 - return type+AF8-dma +- (is+AF8-reclaimable +ACY +ACE-is+AF8-dma) +ACo KMALLOC+AF8-RECLAIM+ADs +AD4 +AD4 +- switch (dr) +AHs +AD4 +AD4 +- default: +AD4 +AD4 +- case 0: +AD4 +AD4 +- return 0+ADs +AD4 +AD4 +- case 1: +AD4 +AD4 +- return KMALLOC+AF8-RECLAIM+ADs +AD4 +AD4 +- case 2: +AD4 +AD4 +- case 3: +AD4 +AD4 +- return KMALLOC+AF8-DMA+ADs +AD4 +AD4 +- +AH0 +AD4 +AD4 +AH0 +AD4 +AD4 Doesn't this defeat the whole point of the code which I thought was to +AD4 avoid conditional jumps and branches? Also why would you bother with +AD4 the +ACI-dr+ACI value when you could just mask the flags value and switch on +AD4 that directly? Storing the relevant bits of 'flags' in the 'dr' variable avoids that the bit selection expressions have to be repeated and allows to use a switch statement instead of multiple if / else statements. Most kmalloc() calls pass a constant to the gfp argument. That allows the compiler to evaluate kmalloc+AF8-type() at compile time. So the conditional jumps and branches only appear when the gfp argument is not a constant. What makes you think it is important to optimize for that case? Bart.