From: Julien Thierry <julien.thierry@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org,
joel@joelfernandes.org, marc.zyngier@arm.com,
christoffer.dall@arm.com, james.morse@arm.com,
catalin.marinas@arm.com, will.deacon@arm.com,
mark.rutland@arm.com, Julien Thierry <julien.thierry@arm.com>,
kvmarm@lists.cs.columbia.edu
Subject: [PATCH v7 10/25] arm64: kvm: Unmask PMR before entering guest
Date: Wed, 12 Dec 2018 16:47:10 +0000 [thread overview]
Message-ID: <1544633245-6036-11-git-send-email-julien.thierry@arm.com> (raw)
In-Reply-To: <1544633245-6036-1-git-send-email-julien.thierry@arm.com>
Interrupts masked by ICC_PMR_EL1 will not be signaled to the CPU. This
means that hypervisor will not receive masked interrupts while running a
guest.
Avoid this by making sure ICC_PMR_EL1 is unmasked when we enter a guest.
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
---
arch/arm64/include/asm/kvm_host.h | 12 ++++++++++++
arch/arm64/kvm/hyp/switch.c | 16 ++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 52fbc82..5c2fe50 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -24,6 +24,7 @@
#include <linux/types.h>
#include <linux/kvm_types.h>
+#include <asm/arch_gicv3.h>
#include <asm/cpufeature.h>
#include <asm/daifflags.h>
#include <asm/fpsimd.h>
@@ -471,6 +472,17 @@ static inline int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)
static inline void kvm_arm_vhe_guest_enter(void)
{
local_daif_mask();
+
+ /*
+ * Having IRQs masked via PMR when entering the guest means the GIC
+ * will not signal the CPU of interrupts of lower priority, and the
+ * only way to get out will be via guest exceptions.
+ * Naturally, we want to avoid this.
+ */
+ if (system_uses_irq_prio_masking()) {
+ gic_write_pmr(GIC_PRIO_IRQON);
+ dsb(sy);
+ }
}
static inline void kvm_arm_vhe_guest_exit(void)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 7cc175c..88ed590 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -22,6 +22,7 @@
#include <kvm/arm_psci.h>
+#include <asm/arch_gicv3.h>
#include <asm/cpufeature.h>
#include <asm/kvm_asm.h>
#include <asm/kvm_emulate.h>
@@ -537,6 +538,17 @@ int __hyp_text __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu)
struct kvm_cpu_context *guest_ctxt;
u64 exit_code;
+ /*
+ * Having IRQs masked via PMR when entering the guest means the GIC
+ * will not signal the CPU of interrupts of lower priority, and the
+ * only way to get out will be via guest exceptions.
+ * Naturally, we want to avoid this.
+ */
+ if (system_uses_irq_prio_masking()) {
+ gic_write_pmr(GIC_PRIO_IRQON);
+ dsb(sy);
+ }
+
vcpu = kern_hyp_va(vcpu);
host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context);
@@ -589,6 +601,10 @@ int __hyp_text __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu)
*/
__debug_switch_to_host(vcpu);
+ /* Returning to host will clear PSR.I, remask PMR if needed */
+ if (system_uses_irq_prio_masking())
+ gic_write_pmr(GIC_PRIO_IRQOFF);
+
return exit_code;
}
--
1.9.1
next prev parent reply other threads:[~2018-12-12 16:49 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-12 16:47 [PATCH v7 00/25] arm64: provide pseudo NMI with GICv3 Julien Thierry
2018-12-12 16:47 ` [PATCH v7 01/25] arm64: Fix HCR.TGE status for NMI contexts Julien Thierry
2018-12-17 8:49 ` Julien Thierry
2018-12-12 16:47 ` [PATCH v7 02/25] arm64: Remove unused daif related functions/macros Julien Thierry
2018-12-12 16:47 ` [PATCH v7 03/25] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2018-12-12 16:47 ` [PATCH v7 04/25] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2018-12-12 16:47 ` [PATCH v7 05/25] arm/arm64: gic-v3: Add PMR and RPR accessors Julien Thierry
2018-12-12 16:47 ` [PATCH v7 06/25] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry
2018-12-12 16:47 ` [PATCH v7 07/25] arm64: ptrace: Provide definitions for PMR values Julien Thierry
2018-12-12 16:47 ` [PATCH v7 08/25] arm64: Make PMR part of task context Julien Thierry
2018-12-12 16:47 ` [PATCH v7 09/25] arm64: Unmask PMR before going idle Julien Thierry
2018-12-12 16:47 ` Julien Thierry [this message]
2018-12-12 16:47 ` [PATCH v7 11/25] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2018-12-12 17:27 ` Ard Biesheuvel
2018-12-12 17:59 ` Julien Thierry
2018-12-12 18:10 ` Ard Biesheuvel
2018-12-13 8:54 ` Julien Thierry
2018-12-13 11:35 ` Ard Biesheuvel
2018-12-13 12:02 ` Julien Thierry
2018-12-13 15:03 ` Julien Thierry
2018-12-14 15:23 ` Julien Thierry
2018-12-14 15:49 ` Ard Biesheuvel
2018-12-14 16:40 ` Julien Thierry
2018-12-19 17:01 ` Julien Thierry
2018-12-20 17:53 ` Ard Biesheuvel
2018-12-21 10:25 ` Julien Thierry
2018-12-16 14:47 ` Jian-Lin Chen
2018-12-17 9:26 ` Julien Thierry
2018-12-18 8:36 ` Jian-Lin Chen
2018-12-12 16:47 ` [PATCH v7 12/25] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2018-12-12 16:47 ` [PATCH v7 13/25] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry
2018-12-12 16:47 ` [PATCH v7 14/25] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2018-12-12 16:47 ` [PATCH v7 15/25] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2018-12-12 16:47 ` [PATCH v7 16/25] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2018-12-12 16:47 ` [PATCH v7 17/25] arm64: gic-v3: Implement arch support for priority masking Julien Thierry
2018-12-12 16:47 ` [PATCH v7 18/25] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry
2018-12-12 16:47 ` [PATCH v7 19/25] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry
2018-12-12 16:47 ` [PATCH v7 20/25] irqchip/gic: Add functions to access irq priorities Julien Thierry
2018-12-12 16:47 ` [PATCH v7 21/25] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2018-12-12 16:47 ` [PATCH v7 22/25] arm64: Handle serror in NMI context Julien Thierry
2018-12-12 16:47 ` [PATCH v7 23/25] arm64: Skip preemption when exiting an NMI Julien Thierry
2018-12-12 16:47 ` [PATCH v7 24/25] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry
2018-12-12 16:47 ` [PATCH v7 25/25] arm64: Enable the support of pseudo-NMIs Julien Thierry
2018-12-12 16:52 ` [PATCH v7 00/25] arm64: provide pseudo NMI with GICv3 Julien Thierry
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