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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: mE2xeyKTHEVJRt7Z18aZ7JMInJoMy5lobgOELK3FNlC/03J4uSTwJK7A7NybwcuRtMvMuc3VbGOJX09Ftm85YM8WlnW6xdp0V7JfbmQsoIs4jLdkQy54ZPIE0dBa5wCJesjea4xhlk5mKD+BddLlUp8+tNf6+MhpTlW/ZOz202T5DNgjZmJt5PnhlHsIrgZkD3tlLFdkPAeENI1JM4sWo6DdpHu9kOoceePU4E0dLpW4ckvt3Lz1bzJS9P551GxoGXvNf/4Z5+QJMxiEhXhlw/m1owvvBHeaaA4jOiZMqdtJy2Fx8yraB7bIxUxSqRAu spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 731fc57c-9105-49d6-6012-08d66580df7f X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Dec 2018 07:09:10.2262 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3787 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The i.MX GPT timer driver binding doc is out of date, update it according to current GPT timer driver. Signed-off-by: Anson Huang --- .../devicetree/bindings/timer/fsl,imxgpt.txt | 35 ++++++++++++++++++= ---- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Docum= entation/devicetree/bindings/timer/fsl,imxgpt.txt index 9809b11..a7f23a6 100644 --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt @@ -2,17 +2,40 @@ Freescale i.MX General Purpose Timer (GPT) =20 Required properties: =20 -- compatible : should be "fsl,-gpt" -- reg : Specifies base physical address and size of the registers. -- interrupts : A list of 4 interrupts; one per timer channel. -- clocks : The clocks provided by the SoC to drive the timer. +- compatible : should be one of following: + + should be "fsl,imx1-gpt" for i.MX1; + + should be one of following for i.MX21/i.MX27: + - "fsl,imx21-gpt", + - "fsl,imx27-gpt", + + should be one of following for i.MX31/i.MX25/i.MX50/i.MX51/i.MX53/i.MX6Q= : + - "fsl,imx31-gpt", + - "fsl,imx25-gpt", + - "fsl,imx50-gpt", + - "fsl,imx51-gpt", + - "fsl,imx53-gpt", + - "fsl,imx6q-gpt", + + should be one of following for i.MX6DL/i.MX6SL/i.MX6SX: + - "fsl,imx6dl-gpt", + - "fsl,imx6sl-gpt", + - "fsl,imx6sx-gpt". + +- reg : specifies base physical address and size of the registers. +- interrupts : should be the gpt interrupt. +- clocks : the clocks provided by the SoC to drive the timer, must contain + an entry for each entry in clock-names. +- clock-names : must include "ipg" entry first, then "per" entry. =20 Example: =20 gpt1: timer@10003000 { - compatible =3D "fsl,imx27-gpt", "fsl,imx1-gpt"; + compatible =3D "fsl,imx27-gpt", "fsl,imx21-gpt"; reg =3D <0x10003000 0x1000>; interrupts =3D <26>; - clocks =3D <&clks 46>, <&clks 61>; + clocks =3D <&clks IMX27_CLK_GPT1_IPG_GATE>, + <&clks IMX27_CLK_PER1_GATE>; clock-names =3D "ipg", "per"; }; --=20 2.7.4