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From: Ley Foon Tan <ley.foon.tan@intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	lftan.linux@gmail.com
Subject: Re: [PATCH v2 1/2] pci: altera: Add Stratix10 PCIe support
Date: Wed, 02 Jan 2019 09:47:14 +0800	[thread overview]
Message-ID: <1546393634.35646.3.camel@intel.com> (raw)
In-Reply-To: <20181231151730.GD159477@google.com>

On Mon, 2018-12-31 at 09:17 -0600, Bjorn Helgaas wrote:
> Run "git log --oneline --follow drivers/pci/controller/pcie-altera.c" 
> and
> make your subject line match in style, phrasing, and capitalization.
> 
> Hint:
> 
>   ............ pci: altera: Add Stratix10 PCIe support
>   ef75369a5b9a PCI: altera: Fix platform_get_irq() error handling
>   bfdbbf0e3c2a PCI: altera: Use size=4 IRQ domain for legacy INTx
>   6ab380957838 PCI: altera: Drop pci_fixup_irqs()
>   9815791319a0 PCI: altera: Convert PCI scan API to
> pci_scan_root_bus_bridge()
>   2a7275a3d867 PCI: altera: Fix TLP_CFG_DW0 for TLP write
> 
> One of these is not like the others.
Okay, will change it.

> 
> On Mon, Dec 31, 2018 at 04:24:52PM +0800, Ley Foon Tan wrote:
> ...
> > 
> > +struct altera_pcie_data {
> > +	int (*tlp_read_pkt)(struct altera_pcie *pcie, u32 *value);
> > +	void (*tlp_write_pkt)(struct altera_pcie *pcie, u32
> > *headers,
> > +			      u32 data, bool align);
> > +	bool (*get_link_status)(struct altera_pcie *pcie);
> > +	int (*rp_read_cfg)(struct altera_pcie *pcie, int where,
> > +			   int size, u32 *value);
> > +	int (*rp_write_cfg)(struct altera_pcie *pcie, u8 bus, int
> > where,
> > +			    int size, u32 value);
> > +	bool s10_flag;		/* Stratix 10 */
> This is OK if you only ever have two programming models (the original
> and Stratix 10).  But if there's a possibility of more, an int model
> type that can be tested with a switch is more extensible.
> 
> Personally I prefer bitfields over bool in structures, but ultimately
> Lorenzo will take this and I don't know whether he has a preference.
> 
> https://lkml.kernel.org/r/CA+55aFxnePDimkVKVtv3gNmRGcwc8KQ5mHYvUxY8sA
> Qg6yvVYg@mail.gmail.com
> https://lkml.kernel.org/r/CA+55aFzKQ6Pj18TB8p4Yr0M4t+S+BsiHH=BJNmn=76
> -NcjTj-g@mail.gmail.com

Yes, you are right. Will change it to something like "version type".

Regards
Ley Foon

  parent reply	other threads:[~2019-01-02  1:47 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-31  8:24 [PATCH v2 0/2] Add Stratix10 PCIe Root Port support Ley Foon Tan
2018-12-31  8:24 ` [PATCH v2 1/2] pci: altera: Add Stratix10 PCIe support Ley Foon Tan
2018-12-31 15:17   ` Bjorn Helgaas
2019-01-02  1:47     ` Tan, Ley Foon
2019-01-02  1:47     ` Ley Foon Tan [this message]
2018-12-31  8:24 ` [PATCH v2 2/2] Documentation: dt-bindings: pci: altera: Add altr,pcie-root-port-2.0 Ley Foon Tan
2018-12-31 16:15 ` [PATCH v2 0/2] Add Stratix10 PCIe Root Port support Bjorn Helgaas
2019-01-02  1:31   ` Ley Foon Tan

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