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Tue, 15 Jan 2019 07:00:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mn3iE/JFNlb4lzpaPXAGNBOdGR7Idnue3apFmeOOZ1Q=; b=qH9nA06UIbetRvs4B38phZdMwNNlmDuKwe5MS006tUcKtLEP0/eKk5X/4KnqQMcB3RVKf69mpI1L98InqN+u9VMFgaXpLEn/ZXw8pOPR9IKVZYY5Epzp9VZEs/y+wzsDU4aY4F67u/RKGyR1yJKK+B6Qm93JcWoB0U/Hum52p5Y= Received: from VI1PR04MB5726.eurprd04.prod.outlook.com (20.178.127.24) by VI1PR04MB4301.eurprd04.prod.outlook.com (52.134.31.156) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1537.24; Tue, 15 Jan 2019 12:00:20 +0000 Received: from VI1PR04MB5726.eurprd04.prod.outlook.com ([fe80::a1c2:cc79:80f3:3bcb]) by VI1PR04MB5726.eurprd04.prod.outlook.com ([fe80::a1c2:cc79:80f3:3bcb%4]) with mapi id 15.20.1516.019; Tue, 15 Jan 2019 12:00:20 +0000 From: Yogesh Narayan Gaur To: "linux-mtd@lists.infradead.org" , "bbrezillon@kernel.org" , "marek.vasut@gmail.com" , "broonie@kernel.org" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" CC: "robh@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "computersforpeace@gmail.com" , "frieder.schrempf@kontron.de" , "linux-kernel@vger.kernel.org" , Yogesh Narayan Gaur Subject: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller Thread-Topic: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller Thread-Index: AQHUrMnj2HaRDCPgY0i5ihL9RBjnkQ== Date: Tue, 15 Jan 2019 12:00:20 +0000 Message-ID: <1547553487-9936-3-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1547553487-9936-1-git-send-email-yogeshnarayan.gaur@nxp.com> In-Reply-To: <1547553487-9936-1-git-send-email-yogeshnarayan.gaur@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SG2PR06CA0096.apcprd06.prod.outlook.com (2603:1096:3:14::22) To VI1PR04MB5726.eurprd04.prod.outlook.com (2603:10a6:803:e4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yogeshnarayan.gaur@nxp.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0d1d1a54-a5fc-4fb4-6c45-08d67ae105d2 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jan 2019 12:00:15.4815 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB4301 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding file for NXP FlexSPI controller Signed-off-by: Yogesh Narayan Gaur Reviewed-by: Rob Herring --- Changes for v8: - None Changes for v7: - None Changes for v6: - None Changes for v5: - None Changes for v4: - Incorporated Rob review comments. Changes for v3: - Removed node property 'big-endian'. Changes for v2: - Incorporated Rob review comments. .../devicetree/bindings/spi/spi-nxp-fspi.txt | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt b/Docum= entation/devicetree/bindings/spi/spi-nxp-fspi.txt new file mode 100644 index 000000000000..2cd67eb727d4 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt @@ -0,0 +1,39 @@ +* NXP Flex Serial Peripheral Interface (FSPI) + +Required properties: + - compatible : Should be "nxp,lx2160a-fspi" + - reg : First contains the register location and length, + Second contains the memory mapping address and length + - reg-names : Should contain the resource reg names: + - fspi_base: configuration register address space + - fspi_mmap: memory mapped address space + - interrupts : Should contain the interrupt for the device + +Required SPI slave node properties: + - reg : There are two buses (A and B) with two chip selects each. + This encodes to which bus and CS the flash is connected: + - <0>: Bus A, CS 0 + - <1>: Bus A, CS 1 + - <2>: Bus B, CS 0 + - <3>: Bus B, CS 1 + +Example showing the usage of two SPI NOR slave devices on bus A: + +fspi0: spi@20c0000 { + compatible =3D "nxp,lx2160a-fspi"; + reg =3D <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>; + reg-names =3D "fspi_base", "fspi_mmap"; + interrupts =3D <0 25 0x4>; /* Level high type */ + clocks =3D <&clockgen 4 3>, <&clockgen 4 3>; + clock-names =3D "fspi_en", "fspi"; + + mt35xu512aba0: flash@0 { + reg =3D <0>; + .... + }; + + mt35xu512aba1: flash@1 { + reg =3D <1>; + .... + }; +}; --=20 2.17.1