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From: Waiman Long <longman@redhat.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>, Will Deacon <will.deacon@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>, "H. Peter Anvin" <hpa@zytor.com>
Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
	x86@kernel.org, Zhenzhong Duan <zhenzhong.duan@oracle.com>,
	James Morse <james.morse@arm.com>,
	SRINIVAS <srinivas.eeda@oracle.com>,
	Waiman Long <longman@redhat.com>
Subject: [PATCH v3 1/4] locking/qspinlock: Handle > 4 slowpath nesting levels
Date: Tue, 29 Jan 2019 22:53:45 +0100	[thread overview]
Message-ID: <1548798828-16156-2-git-send-email-longman@redhat.com> (raw)
In-Reply-To: <1548798828-16156-1-git-send-email-longman@redhat.com>

Four queue nodes per cpu are allocated to enable up to 4 nesting levels
using the per-cpu nodes. Nested NMIs are possible in some architectures.
Still it is very unlikely that we will ever hit more than 4 nested
levels with contention in the slowpath.

When that rare condition happens, however, it is likely that the system
will hang or crash shortly after that. It is not good and we need to
handle this exception case.

This is done by spinning directly on the lock using repeated trylock.
This alternative code path should only be used when there is nested
NMIs. Assuming that the locks used by those NMI handlers will not be
heavily contended, a simple TAS locking should work out.

Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Waiman Long <longman@redhat.com>
Acked-by: Will Deacon <will.deacon@arm.com>
---
 kernel/locking/qspinlock.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
index 8a8c3c2..0875053 100644
--- a/kernel/locking/qspinlock.c
+++ b/kernel/locking/qspinlock.c
@@ -412,6 +412,21 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
 	idx = node->count++;
 	tail = encode_tail(smp_processor_id(), idx);
 
+	/*
+	 * 4 nodes are allocated based on the assumption that there will
+	 * not be nested NMIs taking spinlocks. That may not be true in
+	 * some architectures even though the chance of needing more than
+	 * 4 nodes will still be extremely unlikely. When that happens,
+	 * we fall back to spinning on the lock directly without using
+	 * any MCS node. This is not the most elegant solution, but is
+	 * simple enough.
+	 */
+	if (unlikely(idx >= MAX_NODES)) {
+		while (!queued_spin_trylock(lock))
+			cpu_relax();
+		goto release;
+	}
+
 	node = grab_mcs_node(node, idx);
 
 	/*
-- 
1.8.3.1


  reply	other threads:[~2019-01-29 21:54 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-29 21:53 [PATCH v3 0/4] locking/qspinlock: Handle > 4 nesting levels Waiman Long
2019-01-29 21:53 ` Waiman Long [this message]
2019-02-04  8:58   ` [tip:locking/core] locking/qspinlock: Handle > 4 slowpath " tip-bot for Waiman Long
2019-01-29 21:53 ` [PATCH v3 2/4] locking/qspinlock_stat: Track the no MCS node available case Waiman Long
2019-02-04  8:58   ` [tip:locking/core] " tip-bot for Waiman Long
2019-01-29 21:53 ` [PATCH v3 3/4] locking/qspinlock_stat: Introduce a generic lockevent counting APIs Waiman Long
2019-01-29 21:53 ` [PATCH v3 4/4] locking/lock_events: Make lock_events available for all archs & other locks Waiman Long
2019-01-30 14:07 ` [PATCH v3 0/4] locking/qspinlock: Handle > 4 nesting levels Peter Zijlstra
2019-01-30 16:25   ` Waiman Long

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