From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 971D9C43381 for ; Fri, 22 Feb 2019 19:41:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5F92120700 for ; Fri, 22 Feb 2019 19:41:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="YkuABFJ/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727028AbfBVTlv (ORCPT ); Fri, 22 Feb 2019 14:41:51 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:9380 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726777AbfBVTlp (ORCPT ); Fri, 22 Feb 2019 14:41:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1550864506; x=1582400506; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=LuHhF9t57ihPno63oc42DW7mqejQI1UJBdnLjc5u4ww=; b=YkuABFJ/29dIINiNWxT1hnk/fScVnnpKUmvURPqUSZWFuD00z80AMQgG CW1nFus4ks1rXE5DvJb2m9qfPRonc2KpCInetwQvxSJlh+79c4fqqsYj3 xTk2mEy27EDcYpuca7ClhmHuXVSis8k+KuMelJVl7CgJxrFdyZHXNXl5s jN0VaQJzWE0pTJX2oKo7ckXcfOOF01etGpqzsQdz+9yXZH5C0z+7JVwdQ C7Grr4MPRf9YXMpd4PSwbNO6nazfCIUCtzmkFKyMzN2krzvylAllKovw8 vb/BEbCPpoVnqXktQxPNpQGrMKOiyQTDdnpj76py/GyxM7b5fgxUt40Re w==; X-IronPort-AV: E=Sophos;i="5.58,400,1544457600"; d="scan'208";a="103727139" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 23 Feb 2019 03:41:46 +0800 Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP; 22 Feb 2019 11:22:05 -0800 Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip01.wdc.com with ESMTP; 22 Feb 2019 11:41:46 -0800 From: Atish Patra To: linux-riscv@lists.infradead.org Cc: Atish Patra , Alan Kao , Albert Ou , Andreas Schwab , Anup Patel , Dmitriy Cherkasov , Johan Hovold , linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Thomas Gleixner Subject: [v6 PATCH 6/6] RISC-V: Assign hwcap as per comman capabilities. Date: Fri, 22 Feb 2019 11:41:40 -0800 Message-Id: <1550864500-13652-7-git-send-email-atish.patra@wdc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1550864500-13652-1-git-send-email-atish.patra@wdc.com> References: <1550864500-13652-1-git-send-email-atish.patra@wdc.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, we set hwcap based on first valid hart from DT. This may not be correct always as that hart might not be current booting cpu or may have a different capability. Set hwcap as the capabilities supported by all possible harts with "okay" status. Signed-off-by: Atish Patra --- arch/riscv/kernel/cpufeature.c | 41 ++++++++++++++++++++++------------------- 1 file changed, 22 insertions(+), 19 deletions(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index e7a4701f..bc29b010 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -20,6 +20,7 @@ #include #include #include +#include unsigned long elf_hwcap __read_mostly; #ifdef CONFIG_FPU @@ -42,28 +43,30 @@ void riscv_fill_hwcap(void) elf_hwcap = 0; - /* - * We don't support running Linux on hertergenous ISA systems. For - * now, we just check the ISA of the first "okay" processor. - */ for_each_of_cpu_node(node) { - if (riscv_of_processor_hartid(node) >= 0) - break; - } - if (!node) { - pr_warn("Unable to find \"cpu\" devicetree entry\n"); - return; - } + unsigned long this_hwcap = 0; - if (of_property_read_string(node, "riscv,isa", &isa)) { - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); - of_node_put(node); - return; - } - of_node_put(node); + if (riscv_of_processor_hartid(node) < 0) + continue; - for (i = 0; i < strlen(isa); ++i) - elf_hwcap |= isa2hwcap[(unsigned char)(isa[i])]; + if (of_property_read_string(node, "riscv,isa", &isa)) { + pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); + continue; + } + + for (i = 0; i < strlen(isa); ++i) + this_hwcap |= isa2hwcap[(unsigned char)(isa[i])]; + + /* + * All "okay" hart should have same isa. Set HWCAP based on + * common capabilities of every "okay" hart, in case they don't + * have. + */ + if (elf_hwcap) + elf_hwcap &= this_hwcap; + else + elf_hwcap = this_hwcap; + } /* We don't support systems with F but without D, so mask those out * here. */ -- 2.7.4