From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0632C43381 for ; Wed, 27 Feb 2019 16:05:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6DDDA218CD for ; Wed, 27 Feb 2019 16:05:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729488AbfB0QFq (ORCPT ); Wed, 27 Feb 2019 11:05:46 -0500 Received: from mga01.intel.com ([192.55.52.88]:6599 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725854AbfB0QFn (ORCPT ); Wed, 27 Feb 2019 11:05:43 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Feb 2019 08:05:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,420,1544515200"; d="scan'208";a="303011622" Received: from unknown (HELO luv-build.sc.intel.com) ([172.25.110.25]) by orsmga005.jf.intel.com with ESMTP; 27 Feb 2019 08:05:42 -0800 From: Ricardo Neri To: Thomas Gleixner , Ingo Molnar , Borislav Petkov Cc: Ashok Raj , Andi Kleen , Peter Zijlstra , "Ravi V. Shankar" , x86@kernel.org, linux-kernel@vger.kernel.org, Ricardo Neri , Ricardo Neri , "H. Peter Anvin" , Tony Luck , Philippe Ombredanne , Kate Stewart , "Rafael J. Wysocki" Subject: [RFC PATCH v2 02/14] x86/hpet: Expose more functions to read and write registers Date: Wed, 27 Feb 2019 08:05:06 -0800 Message-Id: <1551283518-18922-3-git-send-email-ricardo.neri-calderon@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551283518-18922-1-git-send-email-ricardo.neri-calderon@linux.intel.com> References: <1551283518-18922-1-git-send-email-ricardo.neri-calderon@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some of the registers in the HPET hardware have a width of 64 bits. 64-bit access functions are needed mostly to read the counter and write the comparator in a single read or write. Also, 64-bit accesses can be used to to read parameters located in the higher bits of some registers (such as the timer period and the IO APIC pins that can be asserted by the timer) without the need of masking and shifting the register values. 64-bit read and write functions are added. These functions, along with the existing hpet_writel(), are exposed via the HPET header to be used by other kernel subsystems. Thus far, the only consumer of these functions will the HPET-based hardlockup detector, which will only be available in 64-bit builds. Thus, the 64-bit access functions are wrapped in CONFIG_X86_64. Cc: "H. Peter Anvin" Cc: Ashok Raj Cc: Andi Kleen Cc: Tony Luck Cc: Philippe Ombredanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: x86@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/hpet.h | 10 ++++++++++ arch/x86/kernel/hpet.c | 12 +++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h index 67385d56d4f4..9e0afde47587 100644 --- a/arch/x86/include/asm/hpet.h +++ b/arch/x86/include/asm/hpet.h @@ -72,6 +72,11 @@ extern int is_hpet_enabled(void); extern int hpet_enable(void); extern void hpet_disable(void); extern unsigned int hpet_readl(unsigned int a); +extern void hpet_writel(unsigned int d, unsigned int a); +#ifdef CONFIG_X86_64 +extern unsigned long hpet_readq(unsigned int a); +extern void hpet_writeq(unsigned long d, unsigned int a); +#endif extern void force_hpet_resume(void); struct irq_data; @@ -109,6 +114,11 @@ extern void hpet_unregister_irq_handler(rtc_irq_handler handler); static inline int hpet_enable(void) { return 0; } static inline int is_hpet_enabled(void) { return 0; } #define hpet_readl(a) 0 +#define hpet_writel(d, a) +#ifdef CONFIG_X86_64 +#define hpet_readq(a) 0 +#define hpet_writeq(d, a) +#endif #define default_setup_hpet_msi NULL #endif diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index dfd3aca82c61..ee439d84e83b 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c @@ -61,12 +61,22 @@ inline unsigned int hpet_readl(unsigned int a) return readl(hpet_virt_address + a); } -static inline void hpet_writel(unsigned int d, unsigned int a) +inline void hpet_writel(unsigned int d, unsigned int a) { writel(d, hpet_virt_address + a); } #ifdef CONFIG_X86_64 +inline unsigned long hpet_readq(unsigned int a) +{ + return readq(hpet_virt_address + a); +} + +inline void hpet_writeq(unsigned long d, unsigned int a) +{ + writeq(d, hpet_virt_address + a); +} + #include #endif -- 2.17.1