From: Vincent Chen <vincentc@andestech.com>
To: <palmer@sifive.com>, <aou@eecs.berkeley.edu>,
<ebiederm@xmission.com>, <jimw@sifive.com>, <arnd@arndb.de>,
<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: <deanbo422@gmail.com>, <vincentc@andestech.com>
Subject: [PATCH 1/3] riscv: Add the support for c.ebreak check in is_valid_bugaddr()
Date: Thu, 28 Feb 2019 18:31:29 +0800 [thread overview]
Message-ID: <1551349891-22683-2-git-send-email-vincentc@andestech.com> (raw)
In-Reply-To: <1551349891-22683-1-git-send-email-vincentc@andestech.com>
The is_valid_bugaddr() function compares the instruction pointed to by
$sepc with macro __BUG_INSN to check whether the current trap exception
is caused by an "ebreak" instruction. Hence the macro __BUG_INSN is
defined as "ebreak". However, this check flow is possibly erroneous
because the expected trap instruction possibly be translated to "c.ebreak"
by assembler if C extension is supported. Therefore, it requires
a mechanism to distinguish the length of the instruction in $spec and
compare it to the correct __BUG_INSN.
By the way, I make the kernel go to die() like BUG() when the trap
type is BUG_TRAP_TYPE_WARN because currently the WARN() does not trigger
any trap exception.
Signed-off-by: Vincent Chen <vincentc@andestech.com>
---
arch/riscv/include/asm/bug.h | 7 ++++++-
arch/riscv/kernel/traps.c | 8 +++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/bug.h b/arch/riscv/include/asm/bug.h
index bfc7f09..1cab7f4 100644
--- a/arch/riscv/include/asm/bug.h
+++ b/arch/riscv/include/asm/bug.h
@@ -21,7 +21,12 @@
#include <asm/asm.h>
#ifdef CONFIG_GENERIC_BUG
-#define __BUG_INSN _AC(0x00100073, UL) /* ebreak */
+#define __INSN_LENGTH_MASK _UL(0x3)
+#define __INSN_LENGTH_32 _UL(0x3)
+#define __COMPRESSED_INSN_MASK _UL(0xffff)
+
+#define __BUG_INSN_32 _UL(0x00100073) /* ebreak */
+#define __BUG_INSN_16 _UL(0x9002) /* c.ebreak */
#ifndef __ASSEMBLY__
typedef u32 bug_insn_t;
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 24a9333..deae0e5 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -129,8 +129,7 @@ asmlinkage void do_trap_break(struct pt_regs *regs)
case BUG_TRAP_TYPE_NONE:
break;
case BUG_TRAP_TYPE_WARN:
- regs->sepc += sizeof(bug_insn_t);
- return;
+ die(regs, "Kernel BUG. Kernel got an unexpected WARN trapped by ebreak");
case BUG_TRAP_TYPE_BUG:
die(regs, "Kernel BUG");
}
@@ -149,7 +148,10 @@ int is_valid_bugaddr(unsigned long pc)
return 0;
if (probe_kernel_address((bug_insn_t *)pc, insn))
return 0;
- return (insn == __BUG_INSN);
+ if ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32)
+ return insn == __BUG_INSN_32;
+ else
+ return (insn & __COMPRESSED_INSN_MASK) == __BUG_INSN_16;
}
#endif /* CONFIG_GENERIC_BUG */
--
1.7.1
next prev parent reply other threads:[~2019-02-28 10:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-28 10:31 [PATCH 0/3] riscv: Fix debug instruction check and support trap-based WARN() Vincent Chen
2019-02-28 10:31 ` Vincent Chen [this message]
2019-02-28 10:31 ` [PATCH 2/3] riscv: Support BUG() in kernel module Vincent Chen
2019-02-28 10:31 ` [PATCH 3/3] riscv: Make WARN() related functions able to trigger a trap exception Vincent Chen
2019-03-04 20:35 ` [PATCH 0/3] riscv: Fix debug instruction check and support trap-based WARN() Palmer Dabbelt
2019-03-05 0:21 ` Vincent Chen
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