From: Qii Wang <qii.wang@mediatek.com>
To: <wsa@the-dreams.de>
Cc: <linux-i2c@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <leilk.liu@mediatek.com>,
<qii.wang@mediatek.com>, <xinping.qian@mediatek.com>,
<liguo.zhang@mediatek.com>, <robh@kernel.org>
Subject: [PATCH RESEND v6 4/6] i2c: mediatek: Add i2c and apdma sync in i2c driver
Date: Tue, 2 Apr 2019 20:35:58 +0800 [thread overview]
Message-ID: <1554208560-14817-5-git-send-email-qii.wang@mediatek.com> (raw)
In-Reply-To: <1554208560-14817-1-git-send-email-qii.wang@mediatek.com>
When i2c and apdma use different source clocks, we should enable
synchronization between them.
Signed-off-by: Qii Wang <qii.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
---
drivers/i2c/busses/i2c-mt65xx.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 1a7235e..6137ad7 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -77,6 +77,8 @@
#define I2C_CONTROL_DIR_CHANGE (0x1 << 4)
#define I2C_CONTROL_ACKERR_DET_EN (0x1 << 5)
#define I2C_CONTROL_TRANSFER_LEN_CHANGE (0x1 << 6)
+#define I2C_CONTROL_DMAACK_EN (0x1 << 8)
+#define I2C_CONTROL_ASYNC_MODE (0x1 << 9)
#define I2C_CONTROL_WRAPPER (0x1 << 0)
#define I2C_DRV_NAME "i2c-mt65xx"
@@ -169,6 +171,7 @@ struct mtk_i2c_compatible {
unsigned char aux_len_reg: 1;
unsigned char support_33bits: 1;
unsigned char timing_adjust: 1;
+ unsigned char dma_sync: 1;
};
struct mtk_i2c {
@@ -218,6 +221,7 @@ struct mtk_i2c {
.aux_len_reg = 1,
.support_33bits = 1,
.timing_adjust = 1,
+ .dma_sync = 0,
};
static const struct mtk_i2c_compatible mt6577_compat = {
@@ -229,6 +233,7 @@ struct mtk_i2c {
.aux_len_reg = 0,
.support_33bits = 0,
.timing_adjust = 0,
+ .dma_sync = 0,
};
static const struct mtk_i2c_compatible mt6589_compat = {
@@ -240,6 +245,7 @@ struct mtk_i2c {
.aux_len_reg = 0,
.support_33bits = 0,
.timing_adjust = 0,
+ .dma_sync = 0,
};
static const struct mtk_i2c_compatible mt7622_compat = {
@@ -251,6 +257,7 @@ struct mtk_i2c {
.aux_len_reg = 1,
.support_33bits = 0,
.timing_adjust = 0,
+ .dma_sync = 0,
};
static const struct mtk_i2c_compatible mt8173_compat = {
@@ -261,6 +268,7 @@ struct mtk_i2c {
.aux_len_reg = 1,
.support_33bits = 1,
.timing_adjust = 0,
+ .dma_sync = 0,
};
static const struct of_device_id mtk_i2c_of_match[] = {
@@ -360,6 +368,9 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
control_reg = I2C_CONTROL_ACKERR_DET_EN |
I2C_CONTROL_CLK_EXT_EN | I2C_CONTROL_DMA_EN;
+ if (i2c->dev_comp->dma_sync)
+ control_reg |= I2C_CONTROL_DMAACK_EN | I2C_CONTROL_ASYNC_MODE;
+
mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);
mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN);
--
1.7.9.5
next prev parent reply other threads:[~2019-04-02 12:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-02 12:35 [PATCH RESEND v6 0/6] add i2c support for mt8183 Qii Wang
2019-04-02 12:35 ` [PATCH RESEND v6 1/6] i2c: mediatek: Add offsets array for new i2c registers Qii Wang
2019-04-02 12:35 ` [PATCH RESEND v6 2/6] dt-bindings: i2c: Add Mediatek MT8183 i2c binding Qii Wang
2019-04-02 12:35 ` [PATCH RESEND v6 3/6] i2c: mediatek: Add arb clock in i2c driver Qii Wang
2019-04-12 18:41 ` Matthias Brugger
2019-04-02 12:35 ` Qii Wang [this message]
2019-04-12 18:42 ` [PATCH RESEND v6 4/6] i2c: mediatek: Add i2c and apdma sync " Matthias Brugger
2019-04-02 12:35 ` [PATCH RESEND v6 5/6] i2c: mediatek: Add i2c support for MediaTek MT8183 Qii Wang
2019-04-12 18:42 ` Matthias Brugger
2019-04-02 12:36 ` [PATCH RESEND v6 6/6] dts: arm64: mt8183: Add I2C nodes Qii Wang
2019-04-15 17:23 ` Matthias Brugger
2019-04-04 23:09 ` [PATCH RESEND v6 0/6] add i2c support for mt8183 Wolfram Sang
2019-04-15 11:30 ` Wolfram Sang
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