From: Dragan Cvetic <dragan.cvetic@xilinx.com>
To: <arnd@arndb.de>, <gregkh@linuxfoundation.org>,
<michal.simek@xilinx.com>, <linux-arm-kernel@lists.infradead.org>
Cc: <linux-kernel@vger.kernel.org>,
Dragan Cvetic <dragan.cvetic@xilinx.com>,
Derek Kiernan <derek.kiernan@xilinx.com>
Subject: [PATCH V2 06/12] misc: xilinx_sdfec: Add ability to configure turbo
Date: Tue, 9 Apr 2019 11:06:48 +0100 [thread overview]
Message-ID: <1554804414-206099-7-git-send-email-dragan.cvetic@xilinx.com> (raw)
In-Reply-To: <1554804414-206099-1-git-send-email-dragan.cvetic@xilinx.com>
mode
Add the capability to configure and retrieve turbo mode
via the ioctls XSDFEC_SET_TURBO and XSDFEC_GET_TURBO.
Tested-by: Dragan Cvetic <dragan.cvetic@xilinx.com>
Signed-off-by: Derek Kiernan <derek.kiernan@xilinx.com>
Signed-off-by: Dragan Cvetic <dragan.cvetic@xilinx.com>
---
drivers/misc/xilinx_sdfec.c | 77 ++++++++++++++++++++++++++++++++++++++++
include/uapi/misc/xilinx_sdfec.h | 71 ++++++++++++++++++++++++++++++++++++
2 files changed, 148 insertions(+)
diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c
index 77ee62d..19b5f96 100644
--- a/drivers/misc/xilinx_sdfec.c
+++ b/drivers/misc/xilinx_sdfec.c
@@ -116,6 +116,12 @@ static dev_t xsdfec_devt;
/* BYPASS Register */
#define XSDFEC_BYPASS_ADDR (0x3C)
+/* Turbo Code Register */
+#define XSDFEC_TURBO_ADDR (0x100)
+#define XSDFEC_TURBO_SCALE_MASK (0xFFF)
+#define XSDFEC_TURBO_SCALE_BIT_POS (8)
+#define XSDFEC_TURBO_SCALE_MAX (15)
+
/**
* struct xsdfec_clks - For managing SD-FEC clocks
* @core_clk: Main processing clock for core
@@ -247,6 +253,71 @@ static int xsdfec_dev_release(struct inode *iptr, struct file *fptr)
return 0;
}
+static int xsdfec_set_turbo(struct xsdfec_dev *xsdfec, void __user *arg)
+{
+ struct xsdfec_turbo turbo;
+ int err;
+ u32 turbo_write;
+
+ err = copy_from_user(&turbo, arg, sizeof(turbo));
+ if (err)
+ return -EFAULT;
+
+ if (turbo.alg >= XSDFEC_TURBO_ALG_MAX) {
+ dev_err(xsdfec->dev,
+ "%s invalid turbo alg value %d for SDFEC%d", __func__,
+ turbo.alg, xsdfec->config.fec_id);
+ return -EINVAL;
+ }
+
+ if (turbo.scale > XSDFEC_TURBO_SCALE_MAX) {
+ dev_err(xsdfec->dev,
+ "%s invalid turbo scale value %d for SDFEC%d", __func__,
+ turbo.scale, xsdfec->config.fec_id);
+ return -EINVAL;
+ }
+
+ /* Check to see what device tree says about the FEC codes */
+ if (xsdfec->config.code == XSDFEC_LDPC_CODE) {
+ dev_err(xsdfec->dev,
+ "%s: Unable to write Turbo to SDFEC%d check DT",
+ __func__, xsdfec->config.fec_id);
+ return -EIO;
+ }
+
+ turbo_write = ((turbo.scale & XSDFEC_TURBO_SCALE_MASK)
+ << XSDFEC_TURBO_SCALE_BIT_POS) |
+ turbo.alg;
+ xsdfec_regwrite(xsdfec, XSDFEC_TURBO_ADDR, turbo_write);
+ return err;
+}
+
+static int xsdfec_get_turbo(struct xsdfec_dev *xsdfec, void __user *arg)
+{
+ u32 reg_value;
+ struct xsdfec_turbo turbo_params;
+ int err;
+
+ if (xsdfec->config.code == XSDFEC_LDPC_CODE) {
+ dev_err(xsdfec->dev,
+ "%s: SDFEC%d is configured for LDPC, check DT",
+ __func__, xsdfec->config.fec_id);
+ return -EIO;
+ }
+
+ reg_value = xsdfec_regread(xsdfec, XSDFEC_TURBO_ADDR);
+
+ turbo_params.scale = (reg_value & XSDFEC_TURBO_SCALE_MASK) >>
+ XSDFEC_TURBO_SCALE_BIT_POS;
+ turbo_params.alg = reg_value & 0x1;
+
+ err = copy_to_user(arg, &turbo_params, sizeof(turbo_params));
+ if (err)
+ err = -EFAULT;
+
+ return err;
+}
+
static u32
xsdfec_translate_axis_width_cfg_val(enum xsdfec_axis_width axis_width_cfg)
{
@@ -340,6 +411,12 @@ static long xsdfec_dev_ioctl(struct file *fptr, unsigned int cmd,
}
switch (cmd) {
+ case XSDFEC_SET_TURBO:
+ rval = xsdfec_set_turbo(xsdfec, arg);
+ break;
+ case XSDFEC_GET_TURBO:
+ rval = xsdfec_get_turbo(xsdfec, arg);
+ break;
default:
/* Should not get here */
dev_err(xsdfec->dev, "Undefined SDFEC IOCTL");
diff --git a/include/uapi/misc/xilinx_sdfec.h b/include/uapi/misc/xilinx_sdfec.h
index 0497b66..b46c90e 100644
--- a/include/uapi/misc/xilinx_sdfec.h
+++ b/include/uapi/misc/xilinx_sdfec.h
@@ -39,6 +39,22 @@ enum xsdfec_order {
};
/**
+ * enum xsdfec_turbo_alg - Turbo Algorithm Type.
+ * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When
+ * scaling is set to this is equivalent to the Max Log-Map
+ * algorithm.
+ * @XSDFEC_MAX_STAR: Log-Map algorithm.
+ * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms.
+ *
+ * This enum specifies which Turbo Decode algorithm is in use.
+ */
+enum xsdfec_turbo_alg {
+ XSDFEC_MAX_SCALE = 0,
+ XSDFEC_MAX_STAR,
+ XSDFEC_TURBO_ALG_MAX,
+};
+
+/**
* enum xsdfec_state - State.
* @XSDFEC_INIT: Driver is initialized.
* @XSDFEC_STARTED: Driver is started.
@@ -96,6 +112,33 @@ enum xsdfec_axis_word_include {
};
/**
+ * struct xsdfec_turbo - User data for Turbo codes.
+ * @alg: Specifies which Turbo decode algorithm to use
+ * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm
+ * has been selected
+ *
+ * Turbo code structure to communicate parameters to XSDFEC driver.
+ */
+struct xsdfec_turbo {
+ enum xsdfec_turbo_alg alg;
+ u8 scale;
+};
+
+/**
+ * struct xsdfec_status - Status of SD-FEC core.
+ * @fec_id: ID of SD-FEC instance. ID is limited to the number of active
+ * SD-FEC's in the FPGA and is related to the driver instance
+ * Minor number.
+ * @state: State of the SD-FEC core
+ * @activity: Describes if the SD-FEC instance is Active
+ */
+struct xsdfec_status {
+ s32 fec_id;
+ enum xsdfec_state state;
+ char activity;
+};
+
+/**
* struct xsdfec_irq - Enabling or Disabling Interrupts.
* @enable_isr: If true enables the ISR
* @enable_ecc_isr: If true enables the ECC ISR
@@ -137,4 +180,32 @@ struct xsdfec_config {
* XSDFEC IOCTL List
*/
#define XSDFEC_MAGIC 'f'
+/**
+ * DOC: XSDFEC_SET_TURBO
+ * @Parameters
+ *
+ * @struct xsdfec_turbo *
+ * Pointer to the &struct xsdfec_turbo that contains the Turbo decode
+ * settings for the SD-FEC core
+ *
+ * @Description
+ *
+ * ioctl that sets the SD-FEC Turbo parameter values
+ *
+ * This can only be used when the driver is in the XSDFEC_STOPPED state
+ */
+#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo)
+/**
+ * DOC: XSDFEC_GET_TURBO
+ * @Parameters
+ *
+ * @struct xsdfec_turbo *
+ * Pointer to the &struct xsdfec_turbo that contains the current Turbo
+ * decode settings of the SD-FEC Block
+ *
+ * @Description
+ *
+ * ioctl that returns SD-FEC turbo param values
+ */
+#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo)
#endif /* __XILINX_SDFEC_H__ */
--
2.7.4
next prev parent reply other threads:[~2019-04-09 10:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-09 10:06 [PATCH V2 00/12] misc: xilinx sd-fec drive Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 01/12] dt-bindings: xilinx-sdfec: Add SDFEC binding Dragan Cvetic
2019-04-25 20:24 ` Greg KH
2019-04-26 12:27 ` Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 02/12] misc: xilinx-sdfec: add core driver Dragan Cvetic
2019-04-25 20:25 ` Greg KH
2019-04-26 12:24 ` Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 03/12] misc: xilinx_sdfec: Add CCF support Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 04/12] misc: xilinx_sdfec: Add open, close and ioctl Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 05/12] misc: xilinx_sdfec: Store driver config and state Dragan Cvetic
2019-04-09 10:06 ` Dragan Cvetic [this message]
2019-04-09 10:06 ` [PATCH V2 07/12] misc: xilinx_sdfec: Add ability to configure LDPC Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 08/12] misc: xilinx_sdfec: Add ability to get/set config Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 09/12] misc: xilinx_sdfec: Support poll file operation Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 10/12] misc: xilinx_sdfec: Add stats & status ioctls Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 11/12] Docs: misc: xilinx_sdfec: Add documentation Dragan Cvetic
2019-04-09 10:06 ` [PATCH V2 12/12] MAINTAINERS: add maintainer for SD-FEC Dragan Cvetic
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