From: Lucas Stach <l.stach@pengutronix.de>
To: Andrey Smirnov <andrew.smirnov@gmail.com>, linux-pci@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Chris Healy <cphealy@gmail.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 08/11] PCI: imx6: Simplify pcie_phy_poll_ack()
Date: Mon, 15 Apr 2019 10:38:02 +0200 [thread overview]
Message-ID: <1555317482.2983.1.camel@pengutronix.de> (raw)
In-Reply-To: <20190415004632.5907-9-andrew.smirnov@gmail.com>
Am Sonntag, den 14.04.2019, 17:46 -0700 schrieb Andrey Smirnov:
> Simplify pcie_phy_poll_ack() by incorporating shifting into constant
> definition and convert the code to use 'bool'. No functional change
> intended.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Chris Healy <cphealy@gmail.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 26 +++++++++++++----------
> ---
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> b/drivers/pci/controller/dwc/pci-imx6.c
> index 669e01353026..3fd084357488 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -112,7 +112,7 @@ struct imx6_pcie {
> #define PCIE_PHY_CTRL_RD BIT(19)
>
> #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
> -#define PCIE_PHY_STAT_ACK_LOC 16
> +#define PCIE_PHY_STAT_ACK BIT(16)
>
> #define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
>
> @@ -151,16 +151,16 @@ struct imx6_pcie {
> #define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5)
> #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3)
>
> -static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int
> exp_val)
> +static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool
> exp_val)
> {
> struct dw_pcie *pci = imx6_pcie->pci;
> - u32 val;
> + bool val;
> u32 max_iterations = 10;
> u32 wait_counter = 0;
>
> do {
> - val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
> - val = (val >> PCIE_PHY_STAT_ACK_LOC) & 0x1;
> + val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) &
> + PCIE_PHY_STAT_ACK;
> wait_counter++;
>
> if (val == exp_val)
> @@ -184,14 +184,14 @@ static int pcie_phy_wait_ack(struct imx6_pcie
> *imx6_pcie, int addr)
> val |= PCIE_PHY_CTRL_CAP_ADR;
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>
> - ret = pcie_phy_poll_ack(imx6_pcie, 1);
> + ret = pcie_phy_poll_ack(imx6_pcie, true);
> if (ret)
> return ret;
>
> val = PCIE_PHY_CTRL_DATA(addr);
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>
> - return pcie_phy_poll_ack(imx6_pcie, 0);
> + return pcie_phy_poll_ack(imx6_pcie, false);
> }
>
> /* Read from the 16-bit PCIe PHY control registers (not memory-
> mapped) */
> @@ -209,7 +209,7 @@ static int pcie_phy_read(struct imx6_pcie
> *imx6_pcie, int addr, int *data)
> phy_ctl = PCIE_PHY_CTRL_RD;
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
>
> - ret = pcie_phy_poll_ack(imx6_pcie, 1);
> + ret = pcie_phy_poll_ack(imx6_pcie, true);
> if (ret)
> return ret;
>
> @@ -219,7 +219,7 @@ static int pcie_phy_read(struct imx6_pcie
> *imx6_pcie, int addr, int *data)
> /* deassert Read signal */
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
>
> - return pcie_phy_poll_ack(imx6_pcie, 0);
> + return pcie_phy_poll_ack(imx6_pcie, false);
> }
>
> static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int
> data)
> @@ -241,7 +241,7 @@ static int pcie_phy_write(struct imx6_pcie
> *imx6_pcie, int addr, int data)
> var |= PCIE_PHY_CTRL_CAP_DAT;
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>
> - ret = pcie_phy_poll_ack(imx6_pcie, 1);
> + ret = pcie_phy_poll_ack(imx6_pcie, true);
> if (ret)
> return ret;
>
> @@ -250,7 +250,7 @@ static int pcie_phy_write(struct imx6_pcie
> *imx6_pcie, int addr, int data)
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>
> /* wait for ack de-assertion */
> - ret = pcie_phy_poll_ack(imx6_pcie, 0);
> + ret = pcie_phy_poll_ack(imx6_pcie, false);
> if (ret)
> return ret;
>
> @@ -259,7 +259,7 @@ static int pcie_phy_write(struct imx6_pcie
> *imx6_pcie, int addr, int data)
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>
> /* wait for ack */
> - ret = pcie_phy_poll_ack(imx6_pcie, 1);
> + ret = pcie_phy_poll_ack(imx6_pcie, true);
> if (ret)
> return ret;
>
> @@ -268,7 +268,7 @@ static int pcie_phy_write(struct imx6_pcie
> *imx6_pcie, int addr, int data)
> dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>
> /* wait for ack de-assertion */
> - ret = pcie_phy_poll_ack(imx6_pcie, 0);
> + ret = pcie_phy_poll_ack(imx6_pcie, false);
> if (ret)
> return ret;
>
next prev parent reply other threads:[~2019-04-15 8:38 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-15 0:46 [PATCH v4 00/11] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 01/11] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 02/11] PCI: imx6: Drop imx6_pcie_wait_for_link() Andrey Smirnov
2019-04-15 8:36 ` Lucas Stach
2019-04-15 0:46 ` [PATCH v4 03/11] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 04/11] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 05/11] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 06/11] PCI: imx6: Make use of BIT() in constant definitions Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 07/11] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 08/11] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2019-04-15 8:38 ` Lucas Stach [this message]
2019-04-15 0:46 ` [PATCH v4 09/11] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 10/11] PCI: imx6: Use flags to indicate support for suspend Andrey Smirnov
2019-04-15 0:46 ` [PATCH v4 11/11] PCI: imx6: Use usleep_range() in imx6_pcie_enable_ref_clk() Andrey Smirnov
2019-04-15 8:38 ` Lucas Stach
2019-05-01 10:39 ` [PATCH v4 00/11] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
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