From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9C33C282E1 for ; Thu, 25 Apr 2019 09:17:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 882EA218B0 for ; Thu, 25 Apr 2019 09:17:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="erSsRncW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728182AbfDYJRw (ORCPT ); Thu, 25 Apr 2019 05:17:52 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:11406 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726887AbfDYJRu (ORCPT ); Thu, 25 Apr 2019 05:17:50 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3P98EbV001148; Thu, 25 Apr 2019 11:17:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=TB3BkgmyReUhhLwwZP6E0LuWO4jA3RAmt5KETLnSFmk=; b=erSsRncWHfTfgt1hSBbJVJkg4qpjxVOYOW155egY+s/7bfch9x6ovQd99jhKgW32hzAp iOo04rFy+9NpvhSA9Bf/HKtFOxlYSA8oxTdfiL8j/uxo5sACisdBXQdSJ0p30mfZ6xTn D9EeRrmLENOkU5ioixzzmPYz2VR8+ds33mPOZsUKLDNKl4Hd+k3MZNdxfanzD0GxcgI5 2PO4ZJhyLNtwEsD8Smktfsyc7kGm6g9leXkczQgnbzNqBLYB/7mTMtZ/Nb5qJTJ/Mp0k rVx+HW3073yt3Vd3rTX3lc5HvKjjpxRAifn/qO7b66qn2Pk4g4EFysbtejs/sZi7K0wv BQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2ryrj6cabb-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 25 Apr 2019 11:17:37 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2B9B83A; Thu, 25 Apr 2019 09:17:37 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0B409161E; Thu, 25 Apr 2019 09:17:37 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 25 Apr 2019 11:17:36 +0200 Received: from localhost (10.201.23.25) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 25 Apr 2019 11:17:36 +0200 From: Fabien Dessenne To: Ohad Ben-Cohen , Bjorn Andersson , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Jonathan Corbet , , , , , , CC: Fabien Dessenne , Benjamin Gaignard Subject: [PATCH v2 6/6] ARM: dts: stm32: hwlocks for GPIO for stm32mp157 Date: Thu, 25 Apr 2019 11:17:23 +0200 Message-ID: <1556183843-28033-7-git-send-email-fabien.dessenne@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1556183843-28033-1-git-send-email-fabien.dessenne@st.com> References: <1556183843-28033-1-git-send-email-fabien.dessenne@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.25] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-04-25_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Declare a shared hwlock to be used by all gpio / pin controllers. Signed-off-by: Fabien Dessenne --- arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index 6b3a9c6..9fd562a 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -14,6 +14,7 @@ ranges = <0 0x50002000 0xa400>; interrupt-parent = <&exti>; st,syscfg = <&exti 0x60 0xff>; + hwlocks = <&hsem 0 1>; pins-are-numbered; gpioa: gpio@50002000 { @@ -424,6 +425,7 @@ pins-are-numbered; interrupt-parent = <&exti>; st,syscfg = <&exti 0x60 0xff>; + hwlocks = <&hsem 0 1>; gpioz: gpio@54004000 { gpio-controller; -- 2.7.4