[PATCH v2 2/5] KVM: X86: Introduce residency msrs read/write operations

[Wanpeng Li <kernellwp@gmail.com>]

From: Wanpeng Li <wanpengli@tencent.com>

Both live migration and vCPU migrates between pCPUs possibly to set the MSRs 
in the host to change the delta between the host and guest values. This patch 
introduces msrs read/write operations in the host.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
 arch/x86/kvm/x86.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index cc97aae..841a794 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1331,6 +1331,51 @@ void kvm_enable_efer_bits(u64 mask)
 }
 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 
+u64 kvm_residency_read_host(struct kvm_vcpu *vcpu,
+		struct kvm_residency_msr *msr)
+{
+	u64 host_value;
+	rdmsrl_safe(msr->index, &host_value);
+	return kvm_scale_tsc(vcpu, host_value);
+}
+
+struct kvm_residency_msr *find_residency_msr_index(struct kvm_vcpu *vcpu,
+		u32 msr_index)
+{
+	int i;
+	struct kvm_residency_msr *msr;
+
+	for (i = 0; i < NR_CORE_RESIDENCY_MSRS; i++)
+		if (vcpu->arch.core_cstate_msrs[i].index == msr_index) {
+			msr = &vcpu->arch.core_cstate_msrs[i];
+			return msr;
+		}
+
+	return NULL;
+}
+
+u64 kvm_residency_read(struct kvm_vcpu *vcpu, u32 msr_index)
+{
+	struct kvm_residency_msr *msr = find_residency_msr_index(vcpu, msr_index);
+
+	if (msr)
+		return msr->value +
+			(msr->delta_from_host ? kvm_residency_read_host(vcpu, msr) : 0);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(kvm_residency_read);
+
+void kvm_residency_write(struct kvm_vcpu *vcpu,
+		u32 msr_index, u64 value)
+{
+	struct kvm_residency_msr *msr = find_residency_msr_index(vcpu, msr_index);
+
+	if (msr)
+		msr->value = value -
+			(msr->delta_from_host ? kvm_residency_read_host(vcpu, msr) : 0);
+}
+EXPORT_SYMBOL_GPL(kvm_residency_write);
+
 /*
  * Writes msr value into into the appropriate "register".
  * Returns 0 on success, non-0 otherwise.
-- 
2.7.4