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From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"David Airlie" <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>,
	Mark Rutland <mark.rutland@arm.com>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v3, 09/27] drm/mediatek: add mutex sof register offset into ddp private data
Date: Thu, 13 Jun 2019 15:45:02 +0800	[thread overview]
Message-ID: <1560411902.27582.0.camel@mtksdaap41> (raw)
In-Reply-To: <1559734986-7379-10-git-send-email-yongqiang.niu@mediatek.com>

Hi, Yongqiang:

On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> 
> mutex sof register offset will be private data of ddp
> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index e1a510f..717609d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -42,12 +42,13 @@
>  #define DISP_REG_CONFIG_DPI_SEL			0x064
>  
>  #define MT2701_DISP_MUTEX0_MOD0			0x2c
> +#define MT2701_DISP_MUTEX0_SOF0			0x2c

0x30?

Regards,
CK

>  
>  #define DISP_REG_MUTEX_EN(n)			(0x20 + 0x20 * (n))
>  #define DISP_REG_MUTEX(n)			(0x24 + 0x20 * (n))
>  #define DISP_REG_MUTEX_RST(n)			(0x28 + 0x20 * (n))
>  #define DISP_REG_MUTEX_MOD(mutex_mod_reg, n)	(mutex_mod_reg + 0x20 * (n))
> -#define DISP_REG_MUTEX_SOF(n)			(0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_SOF(mutex_sof_reg, n)	(mutex_sof_reg + 0x20 * (n))
>  #define DISP_REG_MUTEX_MOD2(n)			(0x34 + 0x20 * (n))
>  
>  #define INT_MUTEX				BIT(1)
> @@ -164,6 +165,7 @@ struct mtk_ddp_data {
>  	const unsigned int *mutex_mod;
>  	const unsigned int *mutex_sof;
>  	const unsigned int mutex_mod_reg;
> +	const unsigned int mutex_sof_reg;
>  };
>  
>  struct mtk_ddp {
> @@ -235,18 +237,21 @@ struct mtk_ddp {
>  	.mutex_mod = mt2701_mutex_mod,
>  	.mutex_sof = mt2712_mutex_sof,
>  	.mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> +	.mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
>  };
>  
>  static const struct mtk_ddp_data mt2712_ddp_driver_data = {
>  	.mutex_mod = mt2712_mutex_mod,
>  	.mutex_sof = mt2712_mutex_sof,
>  	.mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> +	.mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
>  };
>  
>  static const struct mtk_ddp_data mt8173_ddp_driver_data = {
>  	.mutex_mod = mt8173_mutex_mod,
>  	.mutex_sof = mt2712_mutex_sof,
>  	.mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> +	.mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
>  };
>  
>  static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> @@ -528,7 +533,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
>  	}
>  
>  	writel_relaxed(ddp->data->mutex_sof[sof_id],
> -		       ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> +		       ddp->regs +
> +		       DISP_REG_MUTEX_SOF(ddp->data->mutex_sof_reg, mutex->id));
>  }
>  
>  void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -550,7 +556,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
>  	case DDP_COMPONENT_DPI1:
>  		writel_relaxed(MUTEX_SOF_SINGLE_MODE,
>  			       ddp->regs +
> -			       DISP_REG_MUTEX_SOF(mutex->id));
> +			       DISP_REG_MUTEX_SOF(ddp->data->mutex_sof_reg,
> +						  mutex->id));
>  		break;
>  	default:
>  		if (ddp->data->mutex_mod[id] < 32) {



  reply	other threads:[~2019-06-13 16:35 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-05 11:42 [PATCH v3, 00/27] add drm support for MT8183 yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-06-06  3:47   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 02/27] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu
2019-07-09  1:37   ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 03/27] dt-bindings: mediatek: add ccorr " yongqiang.niu
2019-07-09  1:37   ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 04/27] dt-bindings: mediatek: add dither " yongqiang.niu
2019-07-09  1:37   ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 05/27] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-06-06  5:42   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 07/27] drm/mediatek: add mutex mod register offset " yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 08/27] drm/mediatek: add mutex sof " yongqiang.niu
2019-06-06  6:12   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 09/27] drm/mediatek: add mutex sof register offset " yongqiang.niu
2019-06-13  7:45   ` CK Hu [this message]
2019-06-05 11:42 ` [PATCH v3, 10/27] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-06-14  2:26   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 11/27] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-06-14  3:28   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 12/27] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 13/27] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-06-14  3:42   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 14/27] drm/mediatek: add commponent OVL_2L0 yongqiang.niu
2019-06-14  3:54   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 15/27] drm/mediatek: add component OVL_2L1 yongqiang.niu
2019-06-14  3:55   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 16/27] drm/mediatek: add component DITHER yongqiang.niu
2019-06-14  4:36   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 17/27] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-06-14  4:59   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 18/27] drm/medaitek: add layer_nr " yongqiang.niu
2019-06-14  5:02   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 19/27] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-06-17  2:01   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 20/27] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-06-14  5:06   ` CK Hu
2019-06-05 11:43 ` [PATCH v3, 21/27] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 22/27] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 23/27] drm/mediatek: add connection from ovl0 to ovl_2l0 yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 24/27] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 25/27] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 26/27] drm/mediatek: add clock property check before get it yongqiang.niu
2019-06-17  3:06   ` CK Hu
2019-06-05 11:43 ` [PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-06-17  3:30   ` CK Hu

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