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From: Qian Cai <>
Cc:,,,,, Qian Cai <>
Subject: [PATCH v2] x86/cacheinfo: fix a -Wtype-limits warning
Date: Wed, 19 Jun 2019 10:32:53 -0400
Message-ID: <> (raw)

cpuinfo_x86.x86_model is an unsigned type, so compares it against zero
will generate a compilation warning,

arch/x86/kernel/cpu/cacheinfo.c: In function
arch/x86/kernel/cpu/cacheinfo.c:662:19: warning: comparison is always
true due to limited range of data type [-Wtype-limits]

"c->x86 == 0x17" is true if and only if c->x86_model was explicitly set
by cpu_detect(), so just remove the unnecessary checking.

Fixes: 68091ee7ac3c ("x86/CPU/AMD: Calculate last level cache ID from number of sharing threads")
Reviewed-by: Sean Christopherson <>
Signed-off-by: Qian Cai <>

v2: Update the commit message per Sean.

 arch/x86/kernel/cpu/cacheinfo.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index 395d46f78582..c7503be92f35 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -658,8 +658,7 @@ void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
 	if (c->x86 < 0x17) {
 		/* LLC is at the node level. */
 		per_cpu(cpu_llc_id, cpu) = node_id;
-	} else if (c->x86 == 0x17 &&
-		   c->x86_model >= 0 && c->x86_model <= 0x1F) {
+	} else if (c->x86 == 0x17 && c->x86_model <= 0x1F) {
 		 * LLC is at the core complex level.
 		 * Core complex ID is ApicId[3] for these processors.

             reply index

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-19 14:32 Qian Cai [this message]
2019-06-19 17:28 ` [tip:x86/cpu] x86/cacheinfo: Fix " tip-bot for Qian Cai

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