* [PATCH v2] x86/cacheinfo: fix a -Wtype-limits warning
@ 2019-06-19 14:32 Qian Cai
2019-06-19 17:28 ` [tip:x86/cpu] x86/cacheinfo: Fix " tip-bot for Qian Cai
0 siblings, 1 reply; 2+ messages in thread
From: Qian Cai @ 2019-06-19 14:32 UTC (permalink / raw)
To: tglx, mingo, bp
Cc: hpa, sean.j.christopherson, suravee.suthikulpanit, x86,
linux-kernel, Qian Cai
cpuinfo_x86.x86_model is an unsigned type, so compares it against zero
will generate a compilation warning,
arch/x86/kernel/cpu/cacheinfo.c: In function
'cacheinfo_amd_init_llc_id':
arch/x86/kernel/cpu/cacheinfo.c:662:19: warning: comparison is always
true due to limited range of data type [-Wtype-limits]
"c->x86 == 0x17" is true if and only if c->x86_model was explicitly set
by cpu_detect(), so just remove the unnecessary checking.
Fixes: 68091ee7ac3c ("x86/CPU/AMD: Calculate last level cache ID from number of sharing threads")
Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Qian Cai <cai@lca.pw>
---
v2: Update the commit message per Sean.
arch/x86/kernel/cpu/cacheinfo.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index 395d46f78582..c7503be92f35 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -658,8 +658,7 @@ void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
if (c->x86 < 0x17) {
/* LLC is at the node level. */
per_cpu(cpu_llc_id, cpu) = node_id;
- } else if (c->x86 == 0x17 &&
- c->x86_model >= 0 && c->x86_model <= 0x1F) {
+ } else if (c->x86 == 0x17 && c->x86_model <= 0x1F) {
/*
* LLC is at the core complex level.
* Core complex ID is ApicId[3] for these processors.
--
1.8.3.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [tip:x86/cpu] x86/cacheinfo: Fix a -Wtype-limits warning
2019-06-19 14:32 [PATCH v2] x86/cacheinfo: fix a -Wtype-limits warning Qian Cai
@ 2019-06-19 17:28 ` tip-bot for Qian Cai
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot for Qian Cai @ 2019-06-19 17:28 UTC (permalink / raw)
To: linux-tip-commits
Cc: sean.j.christopherson, cai, hpa, gustavo, mhiramat, tglx, mingo,
bp, suravee.suthikulpanit, linux-kernel, x86, mingo, puwen
Commit-ID: 1b7aebf0487613033aff26420e32fa2076d52846
Gitweb: https://git.kernel.org/tip/1b7aebf0487613033aff26420e32fa2076d52846
Author: Qian Cai <cai@lca.pw>
AuthorDate: Wed, 19 Jun 2019 10:32:53 -0400
Committer: Borislav Petkov <bp@suse.de>
CommitDate: Wed, 19 Jun 2019 19:21:32 +0200
x86/cacheinfo: Fix a -Wtype-limits warning
cpuinfo_x86.x86_model is an unsigned type, so comparing against zero
will generate a compilation warning:
arch/x86/kernel/cpu/cacheinfo.c: In function 'cacheinfo_amd_init_llc_id':
arch/x86/kernel/cpu/cacheinfo.c:662:19: warning: comparison is always true \
due to limited range of data type [-Wtype-limits]
Remove the unnecessary lower bound check.
[ bp: Massage. ]
Fixes: 68091ee7ac3c ("x86/CPU/AMD: Calculate last level cache ID from number of sharing threads")
Signed-off-by: Qian Cai <cai@lca.pw>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Pu Wen <puwen@hygon.cn>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/1560954773-11967-1-git-send-email-cai@lca.pw
---
arch/x86/kernel/cpu/cacheinfo.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index 395d46f78582..c7503be92f35 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -658,8 +658,7 @@ void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
if (c->x86 < 0x17) {
/* LLC is at the node level. */
per_cpu(cpu_llc_id, cpu) = node_id;
- } else if (c->x86 == 0x17 &&
- c->x86_model >= 0 && c->x86_model <= 0x1F) {
+ } else if (c->x86 == 0x17 && c->x86_model <= 0x1F) {
/*
* LLC is at the core complex level.
* Core complex ID is ApicId[3] for these processors.
^ permalink raw reply related [flat|nested] 2+ messages in thread
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