From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B280AC5B578 for ; Sat, 29 Jun 2019 02:11:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 955EB2133F for ; Sat, 29 Jun 2019 02:11:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727126AbfF2CLP (ORCPT ); Fri, 28 Jun 2019 22:11:15 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:38237 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726770AbfF2CLP (ORCPT ); Fri, 28 Jun 2019 22:11:15 -0400 X-UUID: 27af247326b4486180f7118b5c522e4a-20190629 X-UUID: 27af247326b4486180f7118b5c522e4a-20190629 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 764061952; Sat, 29 Jun 2019 10:11:08 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 29 Jun 2019 10:10:59 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 29 Jun 2019 10:10:58 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Robin Murphy , Rob Herring CC: Evan Green , Tomasz Figa , Will Deacon , , , , , , , , , , Nicolas Boichat , , Matthias Kaehlcke Subject: [PATCH v8 05/21] iommu/mediatek: Fix iova_to_phys PA start for 4GB mode Date: Sat, 29 Jun 2019 10:09:11 +0800 Message-ID: <1561774167-24141-6-git-send-email-yong.wu@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1561774167-24141-1-git-send-email-yong.wu@mediatek.com> References: <1561774167-24141-1-git-send-email-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the 4GB mode, the physical address is remapped, Here is the detailed remap relationship. CPU PA -> HW PA 0x4000_0000 0x1_4000_0000 (Add bit32) 0x8000_0000 0x1_8000_0000 ... 0xc000_0000 0x1_c000_0000 ... 0x1_0000_0000 0x1_0000_0000 (No change) The PA in the iova_to_phys that is got from v7s always is u32, But from the CPU point of view, PA should add BIT(32) when PA < 0x4000_0000. Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 1ddb2b7..fefc2e0 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -115,6 +115,19 @@ struct mtk_iommu_domain { static const struct iommu_ops mtk_iommu_ops; +/* + * In M4U 4GB mode, the physical address is remapped as below: + * CPU PA -> M4U HW PA + * 0x4000_0000 0x1_4000_0000 (Add bit32) + * 0x8000_0000 0x1_8000_0000 ... + * 0xc000_0000 0x1_c000_0000 ... + * 0x1_0000_0000 0x1_0000_0000 (No change) + * + * The PA in the iova_to_phys that is got from v7s always is u32, But from + * the CPU point of view, PA should add BIT(32) when PA < 0x4000_0000. + */ +#define MTK_IOMMU_4GB_MODE_REMAP_BASE 0x40000000 + static LIST_HEAD(m4ulist); /* List all the M4U HWs */ #define for_each_m4u(data) list_for_each_entry(data, &m4ulist, list) @@ -409,7 +422,7 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, pa = dom->iop->iova_to_phys(dom->iop, iova); spin_unlock_irqrestore(&dom->pgtlock, flags); - if (data->enable_4GB) + if (data->enable_4GB && pa < MTK_IOMMU_4GB_MODE_REMAP_BASE) pa |= BIT_ULL(32); return pa; -- 1.9.1