From: Jiangfeng Xiao <xiaojiangfeng@huawei.com>
To: <davem@davemloft.net>, <robh+dt@kernel.org>,
<yisen.zhuang@huawei.com>, <salil.mehta@huawei.com>,
<mark.rutland@arm.com>, <dingtianhong@huawei.com>,
<xiaojiangfeng@huawei.com>
Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <leeyou.li@huawei.com>,
<nixiaoming@huawei.com>, <jianping.liu@huawei.com>,
<xiekunxun@huawei.com>
Subject: [PATCH v2 07/10] net: hisilicon: Add group field to adapt HI13X1_GMAC
Date: Tue, 9 Jul 2019 11:31:08 +0800 [thread overview]
Message-ID: <1562643071-46811-8-git-send-email-xiaojiangfeng@huawei.com> (raw)
In-Reply-To: <1562643071-46811-1-git-send-email-xiaojiangfeng@huawei.com>
In general, group is the same as the port, but some
boards specify a special group for better load
balancing of each processing unit.
Signed-off-by: Jiangfeng Xiao <xiaojiangfeng@huawei.com>
---
drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hip04_eth.c b/drivers/net/ethernet/hisilicon/hip04_eth.c
index 19d8cfd..5328219 100644
--- a/drivers/net/ethernet/hisilicon/hip04_eth.c
+++ b/drivers/net/ethernet/hisilicon/hip04_eth.c
@@ -178,6 +178,7 @@ struct hip04_priv {
int phy_mode;
int chan;
unsigned int port;
+ unsigned int group;
unsigned int speed;
unsigned int duplex;
unsigned int reg_inten;
@@ -278,10 +279,10 @@ static void hip04_config_fifo(struct hip04_priv *priv)
val |= PPE_CFG_STS_RX_PKT_CNT_RC;
writel_relaxed(val, priv->base + PPE_CFG_STS_MODE);
- val = BIT(priv->port);
+ val = BIT(priv->group);
regmap_write(priv->map, priv->port * 4 + PPE_CFG_POOL_GRP, val);
- val = priv->port << PPE_CFG_QOS_VMID_GRP_SHIFT;
+ val = priv->group << PPE_CFG_QOS_VMID_GRP_SHIFT;
val |= PPE_CFG_QOS_VMID_MODE;
writel_relaxed(val, priv->base + PPE_CFG_QOS_VMID_GEN);
@@ -876,7 +877,7 @@ static int hip04_mac_probe(struct platform_device *pdev)
}
#endif
- ret = of_parse_phandle_with_fixed_args(node, "port-handle", 2, 0, &arg);
+ ret = of_parse_phandle_with_fixed_args(node, "port-handle", 3, 0, &arg);
if (ret < 0) {
dev_warn(d, "no port-handle\n");
goto init_fail;
@@ -884,6 +885,7 @@ static int hip04_mac_probe(struct platform_device *pdev)
priv->port = arg.args[0];
priv->chan = arg.args[1] * RX_DESC_NUM;
+ priv->group = arg.args[2];
hrtimer_init(&priv->tx_coalesce_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
--
1.8.5.6
next prev parent reply other threads:[~2019-07-09 3:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-09 3:31 [PATCH v2 00/10] net: hisilicon: Add support for HI13X1 to hip04_eth Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 01/10] " Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 02/10] net: hisilicon: Cleanup for got restricted __be32 Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 03/10] net: hisilicon: Cleanup for cast to " Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 04/10] net: hisilicon: HI13X1_GMAX skip write LOCAL_PAGE_REG Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 05/10] net: hisilicon: HI13X1_GMAX need dreq reset at first Jiangfeng Xiao
2019-07-09 9:35 ` Sergei Shtylyov
2019-07-09 13:48 ` Jiangfeng Xiao
2019-07-10 5:05 ` Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 06/10] net: hisilicon: dt-bindings: Add an field of port-handle Jiangfeng Xiao
2019-07-09 3:31 ` Jiangfeng Xiao [this message]
2019-07-09 3:31 ` [PATCH v2 08/10] net: hisilicon: Offset buf address to adapt HI13X1_GMAC Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 09/10] net: hisilicon: Add an rx_desc " Jiangfeng Xiao
2019-07-09 3:31 ` [PATCH v2 10/10] net: hisilicon: Add an tx_desc " Jiangfeng Xiao
2019-07-09 21:29 ` [PATCH v2 00/10] net: hisilicon: Add support for HI13X1 to hip04_eth David Miller
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