From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B302CC3A59D for ; Thu, 22 Aug 2019 06:59:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8DAD1233A1 for ; Thu, 22 Aug 2019 06:59:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731911AbfHVG7U (ORCPT ); Thu, 22 Aug 2019 02:59:20 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:46130 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1731197AbfHVG7U (ORCPT ); Thu, 22 Aug 2019 02:59:20 -0400 X-UUID: 9892230d232c4ace851d9d8e20acf3d2-20190822 X-UUID: 9892230d232c4ace851d9d8e20acf3d2-20190822 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0707 with TLS) with ESMTP id 361690198; Thu, 22 Aug 2019 14:59:14 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 22 Aug 2019 14:59:08 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 22 Aug 2019 14:59:08 +0800 From: Sam Shih To: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding CC: Ryder Lee , John Crispin , , , , , Sam Shih Subject: [PATCH v5 0/13] Add mt7629 and fix mt7628 pwm Date: Thu, 22 Aug 2019 14:58:30 +0800 Message-ID: <1566457123-20791-1-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 12CFB085C5D238A2521CDD7EC48FA63A77B9CEB2F2950846F6EAD765795AD1F82000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes since v5: - Follow reviewer's comments: 1. the license stuff is a separate change 2. split fix mt7628 pwm into a single patch 3. to ensure to not use mtk_pwm_clk_name[10] (After dynamic allocate clock array patch, this is no need to check) 4. Use clock-frequency property to replace the use of has_clks Changes since v4: - Follow reviewer's comments (v3: pwm: mediatek: add a property "num-pwms") Move the changes of droping the check for of_device_get_match_data returning non-NULL to next patch - Follow reviewers's comments (v3: pwm: mediatek: allocate the clks array dynamically) 1. use pc->soc->has_clks to check clocks exist or not. 2. Add error message when probe() unable to get clks - Fixes bug when SoC is old mips which has no complex clock tree. if clocks not exist, use the new property from DT to apply period calculation; otherwise, use clk_get_rate to get clock frequency and apply period calculation. Changes since v3: - add a new property "clock-frequency" and fix mt7628 pwm - add mt7629 pwm support Changes since v2: - use num-pwms instead of mediatek,num-pwms. - rename the member from num_pwms to fallback_num_pwms to make it more obvious that it doesn't represent the actually used value. - add a dev_warn and a expressive comment to help other developers to not start adding num_pwms in the compatible_data. Changes since v1: - add some checks for backwards compatibility. Ryder Lee (5): pwm: mediatek: add a property "num-pwms" dt-bindings: pwm: add a property "num-pwms" arm64: dts: mt7622: add a property "num-pwms" for PWM arm: dts: mt7623: add a property "num-pwms" for PWM dt-bindings: pwm: update bindings for MT7629 SoC Sam Shih (8): pwm: mediatek: droping the check for of_device_get_match_data pwm: mediatek: add a property "clock-frequency" pwm: mediatek: allocate the clks array dynamically pwm: mediatek: use pwm_mediatek as common prefix pwm: mediatek: update license and switch to SPDX tag dt-bindings: pwm: update bindings for MT7628 SoC pwm: mediatek: remove a property "has-clock" arm: dts: mediatek: add mt7629 pwm support .../devicetree/bindings/pwm/pwm-mediatek.txt | 12 +- arch/arm/boot/dts/mt7623.dtsi | 1 + arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + drivers/pwm/pwm-mediatek.c | 257 ++++++++++-------- arch/arm/boot/dts/mt7629.dtsi | 16 ++++++++++++++++ 5 files changed, 168 insertions(+), 119 deletions(-) -- 2.17.1