From: <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v5, 07/32] drm/mediatek: add mutex mod into ddp private data
Date: Thu, 29 Aug 2019 22:50:29 +0800 [thread overview]
Message-ID: <1567090254-15566-8-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1567090254-15566-1-git-send-email-yongqiang.niu@mediatek.com>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
except mutex mod, mutex mod reg,mutex sof reg,
and mutex sof id will be ddp private data
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 41 +++++++++++++++++++++++++---------
1 file changed, 30 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 8106a71..b6cc3d8 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -139,12 +139,16 @@ struct mtk_disp_mutex {
bool claimed;
};
+struct mtk_ddp_data {
+ const unsigned int *mutex_mod;
+};
+
struct mtk_ddp {
struct device *dev;
struct clk *clk;
void __iomem *regs;
struct mtk_disp_mutex mutex[10];
- const unsigned int *mutex_mod;
+ const struct mtk_ddp_data *data;
};
static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
@@ -194,6 +198,18 @@ struct mtk_ddp {
[DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
};
+static const struct mtk_ddp_data mt2701_ddp_driver_data = {
+ .mutex_mod = mt2701_mutex_mod,
+};
+
+static const struct mtk_ddp_data mt2712_ddp_driver_data = {
+ .mutex_mod = mt2712_mutex_mod,
+};
+
+static const struct mtk_ddp_data mt8173_ddp_driver_data = {
+ .mutex_mod = mt8173_mutex_mod,
+};
+
static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next,
unsigned int *addr)
@@ -456,15 +472,15 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
reg = MUTEX_SOF_DPI1;
break;
default:
- if (ddp->mutex_mod[id] < 32) {
+ if (ddp->data->mutex_mod[id] < 32) {
offset = DISP_REG_MUTEX_MOD(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
- reg |= 1 << ddp->mutex_mod[id];
+ reg |= 1 << ddp->data->mutex_mod[id];
writel_relaxed(reg, ddp->regs + offset);
} else {
offset = DISP_REG_MUTEX_MOD2(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
- reg |= 1 << (ddp->mutex_mod[id] - 32);
+ reg |= 1 << (ddp->data->mutex_mod[id] - 32);
writel_relaxed(reg, ddp->regs + offset);
}
return;
@@ -494,15 +510,15 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
break;
default:
- if (ddp->mutex_mod[id] < 32) {
+ if (ddp->data->mutex_mod[id] < 32) {
offset = DISP_REG_MUTEX_MOD(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
- reg &= ~(1 << ddp->mutex_mod[id]);
+ reg &= ~(1 << ddp->data->mutex_mod[id]);
writel_relaxed(reg, ddp->regs + offset);
} else {
offset = DISP_REG_MUTEX_MOD2(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
- reg &= ~(1 << (ddp->mutex_mod[id] - 32));
+ reg &= ~(1 << (ddp->data->mutex_mod[id] - 32));
writel_relaxed(reg, ddp->regs + offset);
}
break;
@@ -577,7 +593,7 @@ static int mtk_ddp_probe(struct platform_device *pdev)
return PTR_ERR(ddp->regs);
}
- ddp->mutex_mod = of_device_get_match_data(dev);
+ ddp->data = of_device_get_match_data(dev);
platform_set_drvdata(pdev, ddp);
@@ -590,9 +606,12 @@ static int mtk_ddp_remove(struct platform_device *pdev)
}
static const struct of_device_id ddp_driver_dt_match[] = {
- { .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod},
- { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod},
- { .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod},
+ { .compatible = "mediatek,mt2701-disp-mutex",
+ .data = &mt2701_ddp_driver_data},
+ { .compatible = "mediatek,mt2712-disp-mutex",
+ .data = &mt2712_ddp_driver_data},
+ { .compatible = "mediatek,mt8173-disp-mutex",
+ .data = &mt8173_ddp_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);
--
1.8.1.1.dirty
next prev parent reply other threads:[~2019-08-29 14:53 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 14:50 [PATCH v5, 00/32] add drm support for MT8183 yongqiang.niu
2019-08-29 14:50 ` [PATCH v5, 01/32] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-08-30 5:15 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 02/32] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu
2019-09-04 1:44 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 03/32] dt-bindings: mediatek: add ccorr " yongqiang.niu
2019-09-04 1:44 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 04/32] dt-bindings: mediatek: add dither " yongqiang.niu
2019-09-04 1:45 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 05/32] dt-bindings: mediatek: add mutex " yongqiang.niu
2019-09-02 13:38 ` Rob Herring
2019-09-04 1:45 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 06/32] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-08-29 14:50 ` yongqiang.niu [this message]
2019-10-09 9:31 ` [PATCH v5, 07/32] drm/mediatek: add mutex mod into ddp private data CK Hu
2019-08-29 14:50 ` [PATCH v5, 08/32] drm/mediatek: add mutex mod register offset " yongqiang.niu
2019-10-09 9:32 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 09/32] drm/mediatek: add mutex sof " yongqiang.niu
2019-10-09 9:33 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 10/32] drm/mediatek: add mutex sof register offset " yongqiang.niu
2019-10-09 9:33 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 11/32] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-08-30 5:21 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 12/32] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-08-30 5:27 ` CK Hu
2019-08-30 5:40 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 13/32] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-08-30 5:41 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 14/32] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-10-09 9:10 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 15/32] drm/mediatek: add commponent OVL_2L0 yongqiang.niu
2019-10-09 9:17 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 16/32] drm/mediatek: add component OVL_2L1 yongqiang.niu
2019-10-09 9:18 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 17/32] drm/mediatek: add component DITHER yongqiang.niu
2019-10-09 9:11 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 18/32] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-10-09 9:19 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 19/32] drm/medaitek: add layer_nr " yongqiang.niu
2019-10-09 9:20 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 20/32] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-10-09 9:24 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 21/32] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-10-09 9:24 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 22/32] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu
2019-08-30 5:58 ` CK Hu
2019-09-02 8:11 ` CK Hu
2019-10-09 9:29 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 23/32] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu
2019-10-09 9:28 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 24/32] drm/mediatek: add clock property check before get it yongqiang.niu
2019-08-30 6:11 ` CK Hu
2019-10-09 9:36 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 25/32] drm/mediatek: add connection from OVL0 to OVL_2L0 yongqiang.niu
2019-08-30 6:20 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 26/32] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu
2019-08-30 6:23 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 27/32] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu
2019-08-30 6:25 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 28/32] drm/mediatek: add connection from OVL_2L0 to RDMA0 yongqiang.niu
2019-08-30 6:30 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 29/32] drm/mediatek: add connection from OVL_2L1 to RDMA1 yongqiang.niu
2019-08-30 6:33 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 30/32] drm/mediatek: add connection from DITHER0 to DSI0 yongqiang.niu
2019-08-30 6:34 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 31/32] drm/mediatek: add connection from RDMA0 " yongqiang.niu
2019-08-30 6:36 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 32/32] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-08-30 6:38 ` CK Hu
2019-09-05 7:17 ` CK Hu
2020-05-21 10:52 ` Matthias Brugger
2019-10-09 9:47 ` [PATCH v5, 00/32] add drm support for MT8183 CK Hu
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