From: Eddie James <eajames@linux.ibm.com>
To: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org,
andrew@aj.id.au, joel@jms.id.au, mark.rutland@arm.com,
robh+dt@kernel.org, maz@kernel.org, jason@lakedaemon.net,
tglx@linutronix.de, Eddie James <eajames@linux.ibm.com>
Subject: [PATCH v2 0/4] irqchip: Add Aspeed SCU Interrupt Controller
Date: Fri, 27 Sep 2019 15:58:45 -0500 [thread overview]
Message-ID: <1569617929-29055-1-git-send-email-eajames@linux.ibm.com> (raw)
The Aspeed SOCs provide some interrupts through the System Control
Unit registers. Add an interrupt controller that provides these
interrupts to the system. Add the interrupt controller to the AST25XX
and AST26XX devicetrees.
Changes since v1:
- add a spinlock to protect read-modify-write operation for irq masking
- use readl/writel relaxed versions
- add a comment explaining the irq status/enable register
- provide affinity callback that returns -EINVAL
Eddie James (4):
dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller
irqchip: Add Aspeed SCU interrupt controller
ARM: dts: aspeed: ast2500: Add SCU interrupt controller
ARM: dts: aspeed: ast2600: Add SCU interrupt controllers
.../interrupt-controller/aspeed,ast2xxx-scu-ic.txt | 26 +++
MAINTAINERS | 8 +
arch/arm/boot/dts/aspeed-g5.dtsi | 11 +-
arch/arm/boot/dts/aspeed-g6.dtsi | 18 ++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-aspeed-scu-ic.c | 233 +++++++++++++++++++++
.../interrupt-controller/aspeed-scu-ic.h | 23 ++
7 files changed, 319 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt
create mode 100644 drivers/irqchip/irq-aspeed-scu-ic.c
create mode 100644 include/dt-bindings/interrupt-controller/aspeed-scu-ic.h
--
1.8.3.1
next reply other threads:[~2019-09-27 20:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-27 20:58 Eddie James [this message]
2019-09-27 20:58 ` [PATCH v2 1/4] dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller Eddie James
2019-10-11 14:33 ` Rob Herring
2019-09-27 20:58 ` [PATCH v2 2/4] irqchip: " Eddie James
2019-12-03 1:49 ` Andrew Jeffery
2019-09-27 20:58 ` [PATCH v2 3/4] ARM: dts: aspeed: ast2500: Add " Eddie James
2019-09-27 20:58 ` [PATCH v2 4/4] ARM: dts: aspeed: ast2600: Add SCU interrupt controllers Eddie James
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1569617929-29055-1-git-send-email-eajames@linux.ibm.com \
--to=eajames@linux.ibm.com \
--cc=andrew@aj.id.au \
--cc=devicetree@vger.kernel.org \
--cc=jason@lakedaemon.net \
--cc=joel@jms.id.au \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).