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From: Can Guo <cang@codeaurora.org>
To: asutoshd@codeaurora.org, nguyenb@codeaurora.org,
	rnayak@codeaurora.org, linux-scsi@vger.kernel.org,
	kernel-team@android.com, saravanak@google.com,
	salyzyn@google.com, cang@codeaurora.org
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
	Avri Altman <avri.altman@wdc.com>,
	Pedro Sousa <pedrom.sousa@synopsys.com>,
	"James E.J. Bottomley" <jejb@linux.ibm.com>,
	"Martin K. Petersen" <martin.petersen@oracle.com>,
	Stanley Chu <stanley.chu@mediatek.com>,
	Bean Huo <beanhuo@micron.com>,
	Tomas Winkler <tomas.winkler@intel.com>,
	Subhash Jadavani <subhashj@codeaurora.org>,
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v2 2/5] scsi: ufs: Set DBD setting in mode sense for caching mode page
Date: Mon, 28 Oct 2019 20:10:51 -0700	[thread overview]
Message-ID: <1572318655-28772-3-git-send-email-cang@codeaurora.org> (raw)
In-Reply-To: <1572318655-28772-1-git-send-email-cang@codeaurora.org>

Host sends MODE_SENSE_10 with caching mode page, to check if the device
supports the cache feature.
UFS standards requires DBD field to be set to 1.

Some card vendors are more strict and check the DBD field, hence
respond with CHECK_CONDITION (Sense key set to ILLEGAL_REQUEST and
ASC set to INVALID FIELD IN CDB).
As a result of the CHECK_CONDITION response, host assumes that the
device doesn't support the cache feature and doesn't send
SYNCHORONIZE_CACHE commands to flush the device cache.
This can result in data corruption in case of sudden power down, when
there is data stored in the device cache.

This patch fixes the DBD field setting in case of caching mode page.

Signed-off-by: Can Guo <cang@codeaurora.org>
---
 drivers/scsi/ufs/ufshcd.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index c28c144..101b4d0 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -8329,6 +8329,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
 	host->max_channel = UFSHCD_MAX_CHANNEL;
 	host->unique_id = host->host_no;
 	host->max_cmd_len = UFS_CDB_SIZE;
+	host->set_dbd_for_caching = 1;
 
 	hba->max_pwr_info.is_valid = false;
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


  parent reply	other threads:[~2019-10-29  3:11 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1572318655-28772-1-git-send-email-cang@codeaurora.org>
2019-10-29  3:10 ` [PATCH v2 1/5] scsi: Adjust DBD setting in mode sense for caching mode page per LLD Can Guo
2019-10-31 15:20   ` Mark Salyzyn
2019-10-31 15:40     ` Mark Salyzyn
2019-11-01  0:18       ` cang
2019-10-29  3:10 ` Can Guo [this message]
2019-10-29  3:10 ` [PATCH v2 3/5] scsi: ufs: Release clock if DMA map fails Can Guo
2019-10-29  3:10 ` [PATCH v2 4/5] scsi: ufs: Do not clear the DL layer timers Can Guo
2019-10-29  3:10 ` [PATCH v2 5/5] scsi: ufs: Do not free irq in suspend Can Guo

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