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Fri, 1 Nov 2019 22:41:36 +0000 From: "Suthikulpanit, Suravee" To: "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" CC: "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "joro@8bytes.org" , "vkuznets@redhat.com" , "rkagan@virtuozzo.com" , "graf@amazon.com" , "jschoenh@amazon.de" , "karahmed@amazon.de" , "rimasluk@amazon.com" , "Grimm, Jon" , "Suthikulpanit, Suravee" Subject: [PATCH v4 12/17] svm: Temporary deactivate AVIC during ExtINT handling Thread-Topic: [PATCH v4 12/17] svm: Temporary deactivate AVIC during ExtINT handling Thread-Index: AQHVkQWEgZt6FvN2HkO+qT7S8/jO9g== Date: Fri, 1 Nov 2019 22:41:36 +0000 Message-ID: <1572648072-84536-13-git-send-email-suravee.suthikulpanit@amd.com> References: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com> In-Reply-To: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [165.204.78.1] x-clientproxiedby: SN1PR12CA0047.namprd12.prod.outlook.com (2603:10b6:802:20::18) To DM6PR12MB3865.namprd12.prod.outlook.com (2603:10b6:5:1c8::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Suravee.Suthikulpanit@amd.com; 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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: kcar/xFh0CvCtY6V+keASgrt633f/XVNiodfDiSrr7LUTLChSpYsKjtzxJH2nTmU+fqRsLm+zJhMseGYgO2uIEgfhYa1G4eJv4L4J7bID2AHttNxq3OB0wKi4U9nCXkgF/rQ598F2cecgjJHN7cImNB2WvCflDEFzMEgFQYvRq4U+o222bx4hfWL28MwFcKlUHaHaLAWo0yZFh7sDETVEqWq4FjFUt5+Lvg8j1rSM+6g4GFRsrWqcmzmpUVFFiOaQLjLtdCProOi9J6MsgdQKapQMoKyMRh6NPBNQk2dwos4/5Q0DHrsyFpAUKp/5s778nzHNR+adKgiSkBniQNbrf96GXAl2//pnbz9kGTiY2ssmDUy0Za/5GIHw8+J70+KFW/Z77EqRFTbm8byLLV8vHaJjaBWQ7AYbPZSASwsi4MkCxddrRPXldBJt9a3uV48 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1e51b9ab-1daa-4f18-ab6d-08d75f1ca73f X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2019 22:41:36.7584 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: wblYuEeNiXVE0jPBumSpyjHsWT4df6z2+7UqrAh4BtCUqqwv86itnatfzQM4w8I1ZX+iH6yY7ULTfE511TY7Yg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3243 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AMD AVIC does not support ExtINT. Therefore, AVIC must be temporary deactivated and fall back to using legacy interrupt injection via vINTR and interrupt window. Signed-off-by: Suravee Suthikulpanit --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/svm.c | 37 ++++++++++++++++++++++++++++++++++--- 2 files changed, 35 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 55d6476..fe61269 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -857,6 +857,7 @@ enum kvm_irqchip_mode { #define APICV_DEACT_BIT_DISABLE 0 #define APICV_DEACT_BIT_HYPERV 1 #define APICV_DEACT_BIT_NESTED 2 +#define APICV_DEACT_BIT_IRQWIN 3 =20 struct kvm_arch { unsigned long n_used_mmu_pages; diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 7f59b1a..0e7ff04 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -388,6 +388,8 @@ struct amd_svm_iommu_ir { static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); static void svm_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa); static void svm_complete_interrupts(struct vcpu_svm *svm); +static void svm_request_update_avic(struct kvm_vcpu *vcpu, bool activate); +static bool svm_get_enable_apicv(struct kvm *kvm); static inline void avic_post_state_restore(struct kvm_vcpu *vcpu); =20 static int nested_svm_exit_handled(struct vcpu_svm *svm); @@ -4479,6 +4481,15 @@ static int interrupt_window_interception(struct vcpu= _svm *svm) { kvm_make_request(KVM_REQ_EVENT, &svm->vcpu); svm_clear_vintr(svm); + + /* + * For AVIC, the only reason to end up here is ExtINTs. + * In this case AVIC was temporarily disabled for + * requesting the IRQ window and we have to re-enable it. + */ + if (svm_get_enable_apicv(svm->vcpu.kvm)) + svm_request_update_avic(&svm->vcpu, true); + svm->vmcb->control.int_ctl &=3D ~V_IRQ_MASK; mark_dirty(svm->vmcb, VMCB_INTR); ++svm->vcpu.stat.irq_window_exits; @@ -5166,6 +5177,21 @@ static void svm_hwapic_isr_update(struct kvm_vcpu *v= cpu, int max_isr) { } =20 +static void svm_request_update_avic(struct kvm_vcpu *vcpu, bool activate) +{ + if (!lapic_in_kernel(vcpu)) + return; + /* + * kvm_request_apicv_update() expects a prior read unlock + * on the the kvm->srcu since it subsequently calls read lock + * and re-unlock in __x86_set_memory_region() + * when updating APIC_ACCESS_PAGE_PRIVATE_MEMSLOT. + */ + srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); + kvm_request_apicv_update(vcpu->kvm, activate, APICV_DEACT_BIT_IRQWIN); + vcpu->srcu_idx =3D srcu_read_lock(&vcpu->kvm->srcu); +} + static int svm_set_pi_irte_mode(struct kvm_vcpu *vcpu, bool activate) { int ret =3D 0; @@ -5504,9 +5530,6 @@ static void enable_irq_window(struct kvm_vcpu *vcpu) { struct vcpu_svm *svm =3D to_svm(vcpu); =20 - if (kvm_vcpu_apicv_active(vcpu)) - return; - /* * In case GIF=3D0 we can't rely on the CPU to tell us when GIF becomes * 1, because that's a separate STGI/VMRUN intercept. The next time we @@ -5516,6 +5539,14 @@ static void enable_irq_window(struct kvm_vcpu *vcpu) * window under the assumption that the hardware will set the GIF. */ if ((vgif_enabled(svm) || gif_set(svm)) && nested_svm_intr(svm)) { + /* + * IRQ window is not needed when AVIC is enabled, + * unless we have pending ExtINT since it cannot be injected + * via AVIC. In such case, we need to temporarily disable AVIC, + * and fallback to injecting IRQ via V_IRQ. + */ + if (kvm_vcpu_apicv_active(vcpu)) + svm_request_update_avic(vcpu, false); svm_set_vintr(svm); svm_inject_irq(svm, 0x0); } --=20 1.8.3.1