From: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com> To: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "kvm@vger.kernel.org" <kvm@vger.kernel.org> Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>, "rkrcmar@redhat.com" <rkrcmar@redhat.com>, "joro@8bytes.org" <joro@8bytes.org>, "vkuznets@redhat.com" <vkuznets@redhat.com>, "rkagan@virtuozzo.com" <rkagan@virtuozzo.com>, "graf@amazon.com" <graf@amazon.com>, "jschoenh@amazon.de" <jschoenh@amazon.de>, "karahmed@amazon.de" <karahmed@amazon.de>, "rimasluk@amazon.com" <rimasluk@amazon.com>, "Grimm, Jon" <Jon.Grimm@amd.com>, "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com> Subject: [PATCH v4 16/17] kvm: ioapic: Lazy update IOAPIC EOI Date: Fri, 1 Nov 2019 22:41:41 +0000 [thread overview] Message-ID: <1572648072-84536-17-git-send-email-suravee.suthikulpanit@amd.com> (raw) In-Reply-To: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com> In-kernel IOAPIC does not receive EOI with AMD SVM AVIC since the processor accelerate write to APIC EOI register and does not trap if the interrupt is edge-triggered. Workaround this by lazy check for pending APIC EOI at the time when setting new IOPIC irq, and update IOAPIC EOI if no pending APIC EOI. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> --- arch/x86/kvm/ioapic.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/x86/kvm/ioapic.c b/arch/x86/kvm/ioapic.c index c57b7bb..6fdd88f 100644 --- a/arch/x86/kvm/ioapic.c +++ b/arch/x86/kvm/ioapic.c @@ -48,6 +48,11 @@ static int ioapic_service(struct kvm_ioapic *vioapic, int irq, bool line_status); +static void kvm_ioapic_update_eoi_one(struct kvm_vcpu *vcpu, + struct kvm_ioapic *ioapic, + int trigger_mode, + int pin); + static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic, unsigned long addr, unsigned long length) @@ -174,6 +179,31 @@ static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic) return false; } +static void ioapic_lazy_update_eoi(struct kvm_ioapic *ioapic, int irq) +{ + int i; + struct kvm_vcpu *vcpu; + union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq]; + + kvm_for_each_vcpu(i, vcpu, ioapic->kvm) { + if (!kvm_apic_match_dest(vcpu, NULL, KVM_APIC_DEST_NOSHORT, + entry->fields.dest_id, + entry->fields.dest_mode) || + kvm_apic_pending_eoi(vcpu, entry->fields.vector)) + continue; + + /* + * If no longer has pending EOI in LAPICs, update + * EOI for this vetor. + */ + rtc_irq_eoi(ioapic, vcpu, entry->fields.vector); + kvm_ioapic_update_eoi_one(vcpu, ioapic, + entry->fields.trig_mode, + irq); + break; + } +} + static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq, int irq_level, bool line_status) { @@ -192,6 +222,15 @@ static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq, } /* + * AMD SVM AVIC accelerate EOI write and do not trap, + * in-kernel IOAPIC will not be able to receive the EOI. + * In this case, we do lazy update of the pending EOI when + * trying to set IOAPIC irq. + */ + if (kvm_apicv_activated(ioapic->kvm)) + ioapic_lazy_update_eoi(ioapic, irq); + + /* * Return 0 for coalesced interrupts; for edge-triggered interrupts, * this only happens if a previous edge has not been delivered due * do masking. For level interrupts, the remote_irr field tells -- 1.8.3.1
next prev parent reply other threads:[~2019-11-01 22:41 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-01 22:41 [PATCH v4 00/17] kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 01/17] kvm: x86: Modify kvm_x86_ops.get_enable_apicv() to use struct kvm parameter Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 02/17] kvm: lapic: Introduce APICv update helper function Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 03/17] kvm: x86: Introduce APICv deactivate bits Suthikulpanit, Suravee 2019-11-02 9:51 ` Paolo Bonzini 2019-11-01 22:41 ` [PATCH v4 04/17] kvm: x86: Add support for activate/de-activate APICv at runtime Suthikulpanit, Suravee 2019-11-02 9:52 ` Paolo Bonzini 2019-11-04 19:22 ` Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 05/17] kvm: x86: Add APICv activate/deactivate request trace points Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 06/17] kvm: x86: svm: Add support to activate/deactivate posted interrupts Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 07/17] svm: Add support for setup/destroy virutal APIC backing page for AVIC Suthikulpanit, Suravee 2019-11-04 21:53 ` Roman Kagan 2019-11-12 0:05 ` Suravee Suthikulpanit 2019-11-01 22:41 ` [PATCH v4 08/17] kvm: x86: Introduce APICv pre-update hook Suthikulpanit, Suravee 2019-11-04 22:05 ` Roman Kagan 2019-11-12 0:08 ` Suravee Suthikulpanit 2019-11-12 11:12 ` Roman Kagan 2019-11-01 22:41 ` [PATCH v4 09/17] svm: Add support for activate/deactivate AVIC at runtime Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 10/17] kvm: x86: hyperv: Use APICv update request interface Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 11/17] svm: Deactivate AVIC when launching guest with nested SVM support Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 12/17] svm: Temporary deactivate AVIC during ExtINT handling Suthikulpanit, Suravee 2019-11-02 10:01 ` Paolo Bonzini 2019-11-01 22:41 ` [PATCH v4 13/17] kvm: i8254: Deactivate APICv when using in-kernel PIT re-injection mode Suthikulpanit, Suravee 2019-11-02 9:57 ` Paolo Bonzini 2019-11-04 18:54 ` Suthikulpanit, Suravee 2019-11-04 21:49 ` Paolo Bonzini 2019-11-05 7:05 ` Graf (AWS), Alexander 2019-11-05 8:40 ` Roman Kagan 2019-11-04 23:17 ` Roman Kagan 2019-11-05 22:47 ` Paolo Bonzini 2019-11-11 17:37 ` Suravee Suthikulpanit 2019-11-12 12:22 ` Roman Kagan 2019-11-01 22:41 ` [PATCH v4 14/17] kvm: lapic: Clean up APIC predefined macros Suthikulpanit, Suravee 2019-11-01 22:41 ` [PATCH v4 15/17] kvm: ioapic: Refactor kvm_ioapic_update_eoi() Suthikulpanit, Suravee 2019-11-01 22:41 ` Suthikulpanit, Suravee [this message] 2019-11-01 22:41 ` [PATCH v4 17/17] svm: Allow AVIC with in-kernel irqchip mode Suthikulpanit, Suravee
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