From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33D39FC6197 for ; Fri, 8 Nov 2019 21:14:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 067CA20869 for ; Fri, 8 Nov 2019 21:14:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="meeuVqje"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="bbxJ0DLr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732726AbfKHVOL (ORCPT ); Fri, 8 Nov 2019 16:14:11 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:34522 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732358AbfKHVOK (ORCPT ); Fri, 8 Nov 2019 16:14:10 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5CD9660D95; Fri, 8 Nov 2019 21:14:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1573247649; bh=vsfaLQwdJMswsUGg4yBnLwoJyzM9rdM1iMMBbX5RoFI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=meeuVqje62fSky66IbGHgnTOwej5/TWNAH6brPDcZHta8ptKUaSHenzNvpkrMPetv 44uLKubuJYcr1ErL24xq/ZdWzyC37s1F7iIhV7jz+YRhy3KfTEPf4q4QK7KQdKlX8P O5JHYF8wZTuOkIC6hiQzXOOovGAuodh6xlALUnfk= Received: from jhugo-perf-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jhugo@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6C32C60D51; Fri, 8 Nov 2019 21:14:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1573247648; bh=vsfaLQwdJMswsUGg4yBnLwoJyzM9rdM1iMMBbX5RoFI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bbxJ0DLrr0VDroyVebgC7WHKsxcY2f1XmhrCqaDbqkS4v4pzNYVrJzPQTSZFRBCVk fz9harZzqFAeF06Qn8FhaUoa/DUIqIXZ967BE81jUQnXnetpbIcwcn8vq/38nWUyc4 SjEfRNTcnR6e2LIBR0QarSqqOLzCHQloiwlWFmBI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6C32C60D51 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jhugo@codeaurora.org From: Jeffrey Hugo To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: agross@kernel.org, bjorn.andersson@linaro.org, marc.w.gonzalez@free.fr, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jeffrey Hugo Subject: [PATCH v7 3/6] dt-bindings: clock: Convert qcom,mmcc to DT schema Date: Fri, 8 Nov 2019 14:13:59 -0700 Message-Id: <1573247639-19991-1-git-send-email-jhugo@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1573247450-19738-1-git-send-email-jhugo@codeaurora.org> References: <1573247450-19738-1-git-send-email-jhugo@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the qcom,mmcc-X clock controller binding to DT schema. Signed-off-by: Jeffrey Hugo --- .../devicetree/bindings/clock/qcom,mmcc.txt | 28 --------- .../devicetree/bindings/clock/qcom,mmcc.yaml | 60 +++++++++++++++++++ 2 files changed, 60 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,mmcc.txt create mode 100644 Documentation/devicetree/bindings/clock/qcom,mmcc.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt b/Documentation/devicetree/bindings/clock/qcom,mmcc.txt deleted file mode 100644 index 8b0f7841af8d..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt +++ /dev/null @@ -1,28 +0,0 @@ -Qualcomm Multimedia Clock & Reset Controller Binding ----------------------------------------------------- - -Required properties : -- compatible : shall contain only one of the following: - - "qcom,mmcc-apq8064" - "qcom,mmcc-apq8084" - "qcom,mmcc-msm8660" - "qcom,mmcc-msm8960" - "qcom,mmcc-msm8974" - "qcom,mmcc-msm8996" - -- reg : shall contain base register location and length -- #clock-cells : shall contain 1 -- #reset-cells : shall contain 1 - -Optional properties : -- #power-domain-cells : shall contain 1 - -Example: - clock-controller@4000000 { - compatible = "qcom,mmcc-msm8960"; - reg = <0x4000000 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml new file mode 100644 index 000000000000..769b0869eb9d --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/qcom,mmcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Multimedia Clock & Reset Controller Binding + +maintainers: + - Stephen Boyd + - Jeffrey Hugo + +description: | + Qualcomm multimedia clock control module which supports the clocks, resets and + power domains. + +properties: + compatible : + enum: + - qcom,mmcc-apq8064 + - qcom,mmcc-apq8084 + - qcom,mmcc-msm8660 + - qcom,mmcc-msm8960 + - qcom,mmcc-msm8974 + - qcom,mmcc-msm8996 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + protected-clocks: + description: + Protected clock specifier list as per common clock binding + +required: + - compatible + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +examples: + # Example for GCC for MSM8960: + - | + clock-controller@4000000 { + compatible = "qcom,mmcc-msm8960"; + reg = <0x4000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... -- 2.17.1