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* [PATCH] arm64: dts: agilex: Add EDAC Device Tree
@ 2019-11-08 21:50 thor.thayer
  2019-11-12 15:12 ` Dinh Nguyen
  0 siblings, 1 reply; 2+ messages in thread
From: thor.thayer @ 2019-11-08 21:50 UTC (permalink / raw)
  To: dinguyen, robh+dt, mark.rutland; +Cc: devicetree, linux-kernel, Thor Thayer

From: Thor Thayer <thor.thayer@linux.intel.com>

Add the device tree nodes required to support the Intel
Agilex SoCFPGA EDAC framework.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 59 +++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index f9d1b26a3384..2b3468590f30 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -534,6 +534,65 @@
 			reg = <0xf8011100 0xc0>;
 		};
 
+		eccmgr {
+			compatible = "altr,socfpga-s10-ecc-manager",
+				     "altr,socfpga-a10-ecc-manager";
+			altr,sysmgr-syscon = <&sysmgr>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			interrupts = <0 15 4>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			ranges;
+
+			sdramedac {
+				compatible = "altr,sdram-edac-s10";
+				altr,sdr-syscon = <&sdr>;
+				interrupts = <16 4>;
+			};
+
+			ocram-ecc@ff8cc000 {
+				compatible = "altr,socfpga-s10-ocram-ecc",
+					     "altr,socfpga-a10-ocram-ecc";
+				reg = <0xff8cc000 0x100>;
+				altr,ecc-parent = <&ocram>;
+				interrupts = <1 4>;
+			};
+
+			usb0-ecc@ff8c4000 {
+				compatible = "altr,socfpga-s10-usb-ecc",
+					     "altr,socfpga-usb-ecc";
+				reg = <0xff8c4000 0x100>;
+				altr,ecc-parent = <&usb0>;
+				interrupts = <2 4>;
+			};
+
+			emac0-rx-ecc@ff8c0000 {
+				compatible = "altr,socfpga-s10-eth-mac-ecc",
+					     "altr,socfpga-eth-mac-ecc";
+				reg = <0xff8c0000 0x100>;
+				altr,ecc-parent = <&gmac0>;
+				interrupts = <4 4>;
+			};
+
+			emac0-tx-ecc@ff8c0400 {
+				compatible = "altr,socfpga-s10-eth-mac-ecc",
+					     "altr,socfpga-eth-mac-ecc";
+				reg = <0xff8c0400 0x100>;
+				altr,ecc-parent = <&gmac0>;
+				interrupts = <5 4>;
+			};
+
+			sdmmca-ecc@ff8c8c00 {
+				compatible = "altr,socfpga-s10-sdmmc-ecc",
+					     "altr,socfpga-sdmmc-ecc";
+				reg = <0xff8c8c00 0x100>;
+				altr,ecc-parent = <&mmc>;
+				interrupts = <14 4>,
+					     <15 4>;
+			};
+		};
+
 		qspi: spi@ff8d2000 {
 			compatible = "cdns,qspi-nor";
 			#address-cells = <1>;
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] arm64: dts: agilex: Add EDAC Device Tree
  2019-11-08 21:50 [PATCH] arm64: dts: agilex: Add EDAC Device Tree thor.thayer
@ 2019-11-12 15:12 ` Dinh Nguyen
  0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2019-11-12 15:12 UTC (permalink / raw)
  To: thor.thayer, robh+dt, mark.rutland; +Cc: devicetree, linux-kernel



On 11/8/19 3:50 PM, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add the device tree nodes required to support the Intel
> Agilex SoCFPGA EDAC framework.
> 
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
>  arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 59 +++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> index f9d1b26a3384..2b3468590f30 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> @@ -534,6 +534,65 @@
>  			reg = <0xf8011100 0xc0>;
>  		};
>  
> +		eccmgr {
> +			compatible = "altr,socfpga-s10-ecc-manager",
> +				     "altr,socfpga-a10-ecc-manager";
> +			altr,sysmgr-syscon = <&sysmgr>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			interrupts = <0 15 4>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			ranges;
> +
> +			sdramedac {
> +				compatible = "altr,sdram-edac-s10";
> +				altr,sdr-syscon = <&sdr>;
> +				interrupts = <16 4>;
> +			};
> +
> +			ocram-ecc@ff8cc000 {
> +				compatible = "altr,socfpga-s10-ocram-ecc",
> +					     "altr,socfpga-a10-ocram-ecc";
> +				reg = <0xff8cc000 0x100>;
> +				altr,ecc-parent = <&ocram>;
> +				interrupts = <1 4>;
> +			};
> +
> +			usb0-ecc@ff8c4000 {
> +				compatible = "altr,socfpga-s10-usb-ecc",
> +					     "altr,socfpga-usb-ecc";
> +				reg = <0xff8c4000 0x100>;
> +				altr,ecc-parent = <&usb0>;
> +				interrupts = <2 4>;
> +			};
> +
> +			emac0-rx-ecc@ff8c0000 {
> +				compatible = "altr,socfpga-s10-eth-mac-ecc",
> +					     "altr,socfpga-eth-mac-ecc";
> +				reg = <0xff8c0000 0x100>;
> +				altr,ecc-parent = <&gmac0>;
> +				interrupts = <4 4>;
> +			};
> +
> +			emac0-tx-ecc@ff8c0400 {
> +				compatible = "altr,socfpga-s10-eth-mac-ecc",
> +					     "altr,socfpga-eth-mac-ecc";
> +				reg = <0xff8c0400 0x100>;
> +				altr,ecc-parent = <&gmac0>;
> +				interrupts = <5 4>;
> +			};
> +
> +			sdmmca-ecc@ff8c8c00 {
> +				compatible = "altr,socfpga-s10-sdmmc-ecc",
> +					     "altr,socfpga-sdmmc-ecc";
> +				reg = <0xff8c8c00 0x100>;
> +				altr,ecc-parent = <&mmc>;
> +				interrupts = <14 4>,
> +					     <15 4>;
> +			};
> +		};
> +
>  		qspi: spi@ff8d2000 {
>  			compatible = "cdns,qspi-nor";
>  			#address-cells = <1>;
>

Applied!

Dinh

^ permalink raw reply	[flat|nested] 2+ messages in thread

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