From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40E14C43331 for ; Mon, 11 Nov 2019 08:01:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 13FDA2084F for ; Mon, 11 Nov 2019 08:01:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="iDYL/vBn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726962AbfKKIBm (ORCPT ); Mon, 11 Nov 2019 03:01:42 -0500 Received: from us-smtp-1.mimecast.com ([207.211.31.81]:47654 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726791AbfKKIBl (ORCPT ); Mon, 11 Nov 2019 03:01:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1573459300; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=OpacTWmtO+iXMlkdZbS1mGwj9+49jp5N3bMgW5F1YzI=; b=iDYL/vBnqH7qszy0PUywl98KUnHHTJe8ksmy/oU0HrvGMyrp+CLj2EdSGbbiUqYUMwuvFv Ho1Zo9uTCtG7qs0UytNL9cxKS9KxOPWRuFGYCsvQugOLMcVl2bboQMN4F6JF7vzYW0UM/6 x+jpeJ6FRnMvBjvAPNsdPsGsRHsvy2g= Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-97-igtGeHryM4OEcRIi0d1S1A-1; Mon, 11 Nov 2019 03:01:36 -0500 Received: by mail-pl1-f198.google.com with SMTP id v2so10106559plp.14 for ; Mon, 11 Nov 2019 00:01:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=F5//BPblZoTPMZJjED7koP1nkziC7XQdUgBg/9snEjY=; b=Z6rDu4IKJaUg39cUM800przkRtqtoIlJsoaTDtoqfkUnfkK6ADwiPGGhnGeq9TS3vN B3pwWTov8Hdh0mox1yd0XUibLjjTG3QeU61GLt5ZGoCra5tVD6owlfj3hp5I5rTbCfEg QdFp26fX20t1qPVsDJy5I4Cdf8zeeq3nG9L+Jw6YghDjss8zWK3tNYBvgkpcGoBeFy2p rdF7OQcl2lDW2zTL3aUZI2ZytrMlQsfhKbGRuoRZBHmBpzuNJGn30FpWJ0fUiolXSu6+ QrxyjB9WJBhFw/aA5IYn+d8U+BwHoYqS/1hE3S+8m8GfT+KM5o4H9CXzVLsSlaOE8nxg mLRg== X-Gm-Message-State: APjAAAUP6nsBFhm+QyNGC0lb71xsOG6MikUrD+QzjacreK9FhZSXk1Dy zHmyrNAZ51rIf0I75na5Zp3TeILnfOoRQn5vYkbaONP7sRfpFY/Bj6X262vwELRM7dxV6BcFewv vqci+GINooZ7yWVs8vdnAJR8U X-Received: by 2002:a17:90b:d93:: with SMTP id bg19mr32020898pjb.81.1573459295073; Mon, 11 Nov 2019 00:01:35 -0800 (PST) X-Google-Smtp-Source: APXvYqw8usKKEjYAYwE1du2nBk2kWvDHi2IvPtGckrHHcwJEKDXcLeUgfkse/tWZ8nOIlyzPDEk0gQ== X-Received: by 2002:a17:90b:d93:: with SMTP id bg19mr32020851pjb.81.1573459294770; Mon, 11 Nov 2019 00:01:34 -0800 (PST) Received: from localhost ([122.177.0.15]) by smtp.gmail.com with ESMTPSA id e17sm14079598pgg.5.2019.11.11.00.01.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Nov 2019 00:01:33 -0800 (PST) From: Bhupesh Sharma To: linux-kernel@vger.kernel.org Cc: bhsharma@redhat.com, bhupesh.linux@gmail.com, Boris Petkov , Ingo Molnar , Thomas Gleixner , Jonathan Corbet , James Morse , Mark Rutland , Will Deacon , Steve Capper , Catalin Marinas , Ard Biesheuvel , Michael Ellerman , Paul Mackerras , Benjamin Herrenschmidt , Dave Anderson , Kazuhito Hagio , x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kexec@lists.infradead.org Subject: [PATCH v4 0/3] Append new variables to vmcoreinfo (TCR_EL1.T1SZ for arm64 and MAX_PHYSMEM_BITS for all archs) Date: Mon, 11 Nov 2019 13:31:19 +0530 Message-Id: <1573459282-26989-1-git-send-email-bhsharma@redhat.com> X-Mailer: git-send-email 2.7.4 X-MC-Unique: igtGeHryM4OEcRIi0d1S1A-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes since v3: ---------------- - v3 can be seen here: http://lists.infradead.org/pipermail/kexec/2019-March/022590.html - Addressed comments from James and exported TCR_EL1.T1SZ in vmcoreinfo instead of PTRS_PER_PGD. - Added a new patch (via [PATCH 3/3]), which fixes a simple typo in 'Documentation/arm64/memory.rst' Changes since v2: ---------------- - v2 can be seen here: http://lists.infradead.org/pipermail/kexec/2019-March/022531.html - Protected 'MAX_PHYSMEM_BITS' vmcoreinfo variable under CONFIG_SPARSEMEM ifdef sections, as suggested by Kazu. - Updated vmcoreinfo documentation to add description about 'MAX_PHYSMEM_BITS' variable (via [PATCH 3/3]). Changes since v1: ---------------- - v1 was sent out as a single patch which can be seen here: http://lists.infradead.org/pipermail/kexec/2019-February/022411.html - v2 breaks the single patch into two independent patches: [PATCH 1/2] appends 'PTRS_PER_PGD' to vmcoreinfo for arm64 arch, whereas [PATCH 2/2] appends 'MAX_PHYSMEM_BITS' to vmcoreinfo in core kernel code = (all archs) This patchset primarily fixes the regression reported in user-space utilities like 'makedumpfile' and 'crash-utility' on arm64 architecture with the availability of 52-bit address space feature in underlying kernel. These regressions have been reported both on CPUs which don't support ARMv8.2 extensions (i.e. LVA, LPA) and are running newer kernels and also on prototype platforms (like ARMv8 FVP simulator model) which support ARMv8.2 extensions and are running newer kernels. The reason for these regressions is that right now user-space tools have no direct access to these values (since these are not exported from the kernel) and hence need to rely on a best-guess method of determining value of 'vabits_actual' and 'MAX_PHYSMEM_BITS' supported by underlying kernel. Exporting these values via vmcoreinfo will help user-land in such cases. In addition, as per suggestion from makedumpfile maintainer (Kazu), it makes more sense to append 'MAX_PHYSMEM_BITS' to vmcoreinfo in the core code itself rather than in arm64 arch-specific code, so that the user-space code for other archs can also benefit from this addition to the vmcoreinfo and use it as a standard way of determining 'SECTIONS_SHIFT' value in user-land. Cc: Boris Petkov Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Jonathan Corbet Cc: James Morse Cc: Mark Rutland Cc: Will Deacon Cc: Steve Capper Cc: Catalin Marinas Cc: Ard Biesheuvel Cc: Michael Ellerman Cc: Paul Mackerras Cc: Benjamin Herrenschmidt Cc: Dave Anderson Cc: Kazuhito Hagio Cc: x86@kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: kexec@lists.infradead.org Bhupesh Sharma (3): crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo Documentation/arm64: Fix a simple typo in memory.rst Documentation/arm64/memory.rst | 2 +- arch/arm64/include/asm/pgtable-hwdef.h | 1 + arch/arm64/kernel/crash_core.c | 9 +++++++++ kernel/crash_core.c | 1 + 4 files changed, 12 insertions(+), 1 deletion(-) --=20 2.7.4