From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, rkrcmar@redhat.com, joro@8bytes.org,
vkuznets@redhat.com, rkagan@virtuozzo.com, graf@amazon.com,
jschoenh@amazon.de, karahmed@amazon.de, rimasluk@amazon.com,
jon.grimm@amd.com,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v5 08/18] kvm: x86: Introduce APICv x86 ops for checking APIC inhibit reasons
Date: Thu, 14 Nov 2019 14:15:10 -0600 [thread overview]
Message-ID: <1573762520-80328-9-git-send-email-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <1573762520-80328-1-git-send-email-suravee.suthikulpanit@amd.com>
Inibit reason bits are used to determine if APICv deactivation is
applicable for a particular hardware virtualization architecture.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/svm.c | 8 ++++++++
arch/x86/kvm/vmx/vmx.c | 8 ++++++++
arch/x86/kvm/x86.c | 4 ++++
4 files changed, 21 insertions(+)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 25383b6..5ee6331 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1090,6 +1090,7 @@ struct kvm_x86_ops {
void (*enable_irq_window)(struct kvm_vcpu *vcpu);
void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
bool (*get_enable_apicv)(struct kvm *kvm);
+ bool (*check_apicv_inhibit_reasons)(ulong bit);
void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 3ffb437..8bffd93 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -7223,6 +7223,13 @@ static bool svm_apic_init_signal_blocked(struct kvm_vcpu *vcpu)
(svm->vmcb->control.intercept & (1ULL << INTERCEPT_INIT));
}
+static bool svm_check_apicv_inhibit_reasons(ulong bit)
+{
+ ulong supported = BIT(APICV_INHIBIT_REASON_DISABLE);
+
+ return supported & BIT(bit);
+}
+
static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
.cpu_has_kvm_support = has_svm,
.disabled_by_bios = is_disabled,
@@ -7300,6 +7307,7 @@ static bool svm_apic_init_signal_blocked(struct kvm_vcpu *vcpu)
.set_virtual_apic_mode = svm_set_virtual_apic_mode,
.get_enable_apicv = svm_get_enable_apicv,
.refresh_apicv_exec_ctrl = svm_refresh_apicv_exec_ctrl,
+ .check_apicv_inhibit_reasons = svm_check_apicv_inhibit_reasons,
.load_eoi_exitmap = svm_load_eoi_exitmap,
.hwapic_irr_update = svm_hwapic_irr_update,
.hwapic_isr_update = svm_hwapic_isr_update,
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d6d1c862..8f51569 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7732,6 +7732,13 @@ static __exit void hardware_unsetup(void)
free_kvm_area();
}
+static bool vmx_check_apicv_inhibit_reasons(ulong bit)
+{
+ ulong supported = BIT(APICV_INHIBIT_REASON_DISABLE);
+
+ return supported & BIT(bit);
+}
+
static struct kvm_x86_ops vmx_x86_ops __ro_after_init = {
.cpu_has_kvm_support = cpu_has_kvm_support,
.disabled_by_bios = vmx_disabled_by_bios,
@@ -7809,6 +7816,7 @@ static __exit void hardware_unsetup(void)
.refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl,
.load_eoi_exitmap = vmx_load_eoi_exitmap,
.apicv_post_state_restore = vmx_apicv_post_state_restore,
+ .check_apicv_inhibit_reasons = vmx_check_apicv_inhibit_reasons,
.hwapic_irr_update = vmx_hwapic_irr_update,
.hwapic_isr_update = vmx_hwapic_isr_update,
.guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 044c628..1ab8e66 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7882,6 +7882,10 @@ void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
*/
void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
{
+ if (!kvm_x86_ops->check_apicv_inhibit_reasons ||
+ !kvm_x86_ops->check_apicv_inhibit_reasons(bit))
+ return;
+
if (activate) {
if (!test_and_clear_bit(bit, &kvm->arch.apicv_inhibit_reasons) ||
!kvm_apicv_activated(kvm))
--
1.8.3.1
next prev parent reply other threads:[~2019-11-14 20:15 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 20:15 [PATCH v5 00/18] kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 01/18] kvm: x86: Modify kvm_x86_ops.get_enable_apicv() to use struct kvm parameter Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 02/18] kvm: lapic: Introduce APICv update helper function Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 03/18] kvm: x86: Introduce APICv inhibit reason bits Suravee Suthikulpanit
2020-01-22 15:51 ` Paolo Bonzini
2019-11-14 20:15 ` [PATCH v5 04/18] kvm: x86: Add support for dynamic APICv Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 05/18] kvm: x86: Add APICv (de)activate request trace points Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 06/18] kvm: x86: svm: Add support to (de)activate posted interrupts Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 07/18] svm: Add support for setup/destroy virutal APIC backing page for AVIC Suravee Suthikulpanit
2019-11-14 20:15 ` Suravee Suthikulpanit [this message]
2019-11-14 20:15 ` [PATCH v5 09/18] kvm: x86: Introduce x86 ops hook for pre-update APICv Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 10/18] svm: Add support for dynamic APICv Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 11/18] kvm: x86: hyperv: Use APICv update request interface Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 12/18] svm: Deactivate AVIC when launching guest with nested SVM support Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 13/18] svm: Temporary deactivate AVIC during ExtINT handling Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 14/18] kvm: i8254: Deactivate APICv when using in-kernel PIT re-injection mode Suravee Suthikulpanit
2020-02-18 18:51 ` Alex Williamson
2020-02-21 2:27 ` Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 15/18] kvm: lapic: Clean up APIC predefined macros Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 16/18] kvm: ioapic: Refactor kvm_ioapic_update_eoi() Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 17/18] kvm: ioapic: Lazy update IOAPIC EOI Suravee Suthikulpanit
2019-11-14 20:15 ` [PATCH v5 18/18] svm: Allow AVIC with in-kernel irqchip mode Suravee Suthikulpanit
2020-01-22 16:06 ` Paolo Bonzini
2020-01-02 10:17 ` [PATCH v5 00/18] kvm: x86: Support AMD SVM AVIC w/ " Suravee Suthikulpanit
2020-01-20 6:16 ` Suravee Suthikulpanit
2020-01-22 16:08 ` Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1573762520-80328-9-git-send-email-suravee.suthikulpanit@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=graf@amazon.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=jschoenh@amazon.de \
--cc=karahmed@amazon.de \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=rimasluk@amazon.com \
--cc=rkagan@virtuozzo.com \
--cc=rkrcmar@redhat.com \
--cc=vkuznets@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).