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From: Paolo Bonzini <pbonzini@redhat.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: jmattson@google.com,
	Sean Christopherson <sean.j.christopherson@intel.com>
Subject: [PATCH 3/5] KVM: x86: implement MSR_IA32_TSX_CTRL effect on CPUID
Date: Mon, 18 Nov 2019 19:17:45 +0100	[thread overview]
Message-ID: <1574101067-5638-4-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1574101067-5638-1-git-send-email-pbonzini@redhat.com>

Because KVM always emulates CPUID, the CPUID clear bit
(bit 1) of MSR_IA32_TSX_CTRL must be emulated "manually"
by the hypervisor when performing said emulation.

Right now neither kvm-intel.ko nor kvm-amd.ko implement
MSR_IA32_TSX_CTRL but this will change in the next patch.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/include/asm/kvm_host.h | 1 +
 arch/x86/kvm/cpuid.c            | 8 ++++++--
 arch/x86/kvm/x86.c              | 4 ++--
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 4fc61483919a..663d09ac7778 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1357,6 +1357,7 @@ int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
 
 void kvm_enable_efer_bits(u64);
 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
+int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index f68c0c753c38..c0aa07487eb8 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -816,8 +816,6 @@ static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func,
 	return __do_cpuid_func(entry, func, nent, maxnent);
 }
 
-#undef F
-
 struct kvm_cpuid_param {
 	u32 func;
 	bool (*qualifier)(const struct kvm_cpuid_param *param);
@@ -1015,6 +1013,12 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
 		*ebx = entry->ebx;
 		*ecx = entry->ecx;
 		*edx = entry->edx;
+		if (function == 7 && index == 0) {
+			u64 data;
+		        if (!__kvm_get_msr(vcpu, MSR_IA32_TSX_CTRL, &data, true) &&
+			    (data & TSX_CTRL_CPUID_CLEAR))
+				*ebx &= ~(F(RTM) | F(HLE));
+		}
 	} else {
 		*eax = *ebx = *ecx = *edx = 0;
 		/*
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 02863998af91..648e84e728fc 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1484,8 +1484,8 @@ static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
  * Returns 0 on success, non-0 otherwise.
  * Assumes vcpu_load() was already called.
  */
-static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
-			 bool host_initiated)
+int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
+		  bool host_initiated)
 {
 	struct msr_data msr;
 	int ret;
-- 
1.8.3.1



  parent reply	other threads:[~2019-11-18 18:18 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-18 18:17 [PATCH 0/5] KVM: vmx: implement MSR_IA32_TSX_CTRL for guests Paolo Bonzini
2019-11-18 18:17 ` [PATCH 1/5] KVM: x86: fix presentation of TSX feature in ARCH_CAPABILITIES Paolo Bonzini
2019-11-18 19:39   ` Jim Mattson
2019-11-18 20:48   ` Jim Mattson
2019-11-22 20:15   ` Sean Christopherson
2019-11-18 18:17 ` [PATCH 2/5] KVM: x86: do not modify masked bits of shared MSRs Paolo Bonzini
2019-11-19 19:00   ` Jim Mattson
2019-11-18 18:17 ` Paolo Bonzini [this message]
2019-11-19 20:02   ` [PATCH 3/5] KVM: x86: implement MSR_IA32_TSX_CTRL effect on CPUID Jim Mattson
2019-11-18 18:17 ` [PATCH 4/5] KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality Paolo Bonzini
2019-11-19 21:06   ` Jim Mattson
2019-11-20 12:21     ` Paolo Bonzini
2019-12-04 23:49   ` Jim Mattson
2019-12-05 10:16     ` Paolo Bonzini
2019-11-18 18:17 ` [PATCH 5/5] KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it Paolo Bonzini
2019-11-21  2:22   ` Eduardo Habkost
2019-11-21  9:05     ` Paolo Bonzini

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